Bug 1010

Summary: 1st Draft OPF ISA WG External RFC ls003: "bigint" operations
Product: Libre-SOC's first SoC Reporter: Luke Kenneth Casson Leighton <lkcl>
Component: SpecificationAssignee: Luke Kenneth Casson Leighton <lkcl>
Status: RESOLVED FIXED    
Severity: enhancement CC: libre-soc-isa, programmerjake
Priority: ---    
Version: unspecified   
Hardware: PC   
OS: Linux   
URL: https://libre-soc.org/openpower/sv/rfc/ls003/
See Also: https://bugs.libre-soc.org/show_bug.cgi?id=772
https://bugs.libre-soc.org/show_bug.cgi?id=817
https://bugs.libre-soc.org/show_bug.cgi?id=937
https://bugs.libre-soc.org/show_bug.cgi?id=960
NLnet milestone: NLnet.2022-08-051.OPF total budget (EUR) for completion of task and all subtasks: 2000
budget (EUR) for this task, excluding subtasks' budget: 2000 parent task for budget allocation: 1009
child tasks for budget allocation: The table of payments (in EUR) for this task; TOML format:
[jacob] amount = 750 submitted = 2023-06-28 paid = 2023-07-12 [lkcl] amount = 1250 submitted = 2023-06-22 paid = 2023-06-25
Bug Depends on:    
Bug Blocks: 960    

Description Luke Kenneth Casson Leighton 2023-03-02 12:51:33 GMT
write and submit the first Draft of ls003.
this RFC is for adding five biginteger operations:
* maddedu    Multiply-Add Extend Double Unsigned
* maddedus   Multiply-Add Extend Double Signed/Unsigned
* divmod2du  Divide/Modulo Quad-Double Unsigned
* dsld       Double-Shift Left Doubleword
* dsrd       Double-Shift Right Doubleword

**NOTE**: some of this Draft RFC was written prior
to the 2022-08-051 Grant's approval date, 25oct2023.
however additional work continues **AFTER** that date
and thus **ONLY** that additional work may apply for
an RFP.
Comment 1 Luke Kenneth Casson Leighton 2023-03-02 12:55:43 GMT
Author: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date:   Thu Mar 2 12:03:01 2023 +0000

    add section VA2-Form regs needed
    update descriptions of dsld and dsrd in ls003

https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff;h=a613a073191df7ba12e445bb49817a18a1da6e90
Comment 2 Luke Kenneth Casson Leighton 2023-03-02 13:06:57 GMT
Author: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date:   Thu Mar 2 13:06:29 2023 +0000

    ls003: add to motivation (about dsld and dsrd),
    correction of "warm words" for dsld and dsrd,
    proposing four instructions not two

https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff;h=f69dec9cf3eff82a11d4444f52ed83be6041ede0
Comment 3 Jacob Lifshay 2023-03-02 22:49:58 GMT
we should probably add maddedus too, since it's the only unsigned*signed mul in powerisa. it's (u64)RA * (i64)RB + (i64)RC
Comment 4 Jacob Lifshay 2023-03-03 04:45:06 GMT
note dsld./dsrd. (only the Rc=1 variants) need to be removed because of being 4-in/4-out:
https://bugs.libre-soc.org/show_bug.cgi?id=960#c19
Comment 5 Jacob Lifshay 2023-03-03 05:28:12 GMT
lkcl, I'll leave removing Rc from dsld/dsrd for after you've had a chance to confirm that's what we want.

meanwhile:
commit 1b14f6038a6a6524668ba4a4695f35b1eadac9ff (HEAD -> master, origin/master, origin/HEAD)
Good "git" signature for programmerjake@gmail.com with RSA key SHA256:B1iRVvUJkvd7upMIiMqn6OyxvD2SgJkAH3ZnUOj6z+c
Author: Jacob Lifshay <programmerjake@gmail.com>
Date:   Thu Mar 2 21:24:22 2023 -0800

    add maddedus to ls003

https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff;h=1b14f6038a6a6524668ba4a4695f35b1eadac9ff
Comment 6 Luke Kenneth Casson Leighton 2023-03-03 10:22:09 GMT
commit 93baff679283de184fa11d167fe7517f06ad4877 (HEAD -> master)
Author: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date:   Fri Mar 3 10:16:57 2023 +0000

    cleanup ls003 - clarify Rc=1 setting overflow,
    remove comment on divmod2du, add pagebreaks

https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff;h=c9eaf69b606abb36577889a8340e2bcec5883171

continuing conversation:

https://lists.libre-soc.org/pipermail/libre-soc-dev/2023-March/005519.html
Comment 7 Luke Kenneth Casson Leighton 2023-03-03 10:22:31 GMT
(In reply to Jacob Lifshay from comment #5)
> lkcl, I'll leave removing Rc from dsld/dsrd for after you've had a chance to
> confirm that's what we want.

it's not getting removed.
Comment 8 Jacob Lifshay 2023-03-03 10:25:50 GMT
(In reply to Luke Kenneth Casson Leighton from comment #7)
> (In reply to Jacob Lifshay from comment #5)
> > lkcl, I'll leave removing Rc from dsld/dsrd for after you've had a chance to
> > confirm that's what we want.
> 
> it's not getting removed.

oh, why not? iirc you basically said more than 3-in/2-out was a dealbreaker
Comment 9 Luke Kenneth Casson Leighton 2023-03-03 10:34:10 GMT
Author: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date:   Fri Mar 3 10:32:45 2023 +0000

    ls003: now 5 instructions being proposed.
    shorten the words in the observations section to fit onto 1st page

https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff;h=0970139d9d2848364c8019a2262b57758107fd78
Comment 10 Luke Kenneth Casson Leighton 2023-03-03 10:38:19 GMT
(In reply to Jacob Lifshay from comment #8)

> oh, why not? iirc you basically said more than 3-in/2-out was a dealbreaker

for *64-bit* datapaths. CR Fields are 4-bit.

although... yeah, a case could be made that the priority is
the Dependency Hazard Matrices, and that it's not the size
of the datapaths themselves that are the only consideration.

4-in is *definitely* not okay.  3-out (64-bit RT, 64-bit RS, 4-bit CR0)
is... dicey.  i'm happy to raise it with the ISA WG, to get
them to pass it through to IBM's Architects, to see what
they think.
Comment 11 Luke Kenneth Casson Leighton 2023-03-03 10:47:38 GMT
Author: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date:   Fri Mar 3 10:47:06 2023 +0000

    add comment needing resolution in ls003 about 3-in 3-out

https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff;h=1da926f056c7f89f0992e5e63da54327886d113d
Comment 12 Luke Kenneth Casson Leighton 2023-03-03 11:21:09 GMT
RFC submitted 03mar2023, [[OPF][ISA] #1875]