Bug 1018

Summary: byte swaps needed for fprs (fgrevi?) and fpr/gpr transfers
Product: Libre-SOC's first SoC Reporter: Jacob Lifshay <programmerjake>
Component: SpecificationAssignee: Jacob Lifshay <programmerjake>
Status: RESOLVED WONTFIX    
Severity: enhancement CC: libre-soc-isa, programmerjake
Priority: ---    
Version: unspecified   
Hardware: Other   
OS: Linux   
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Bug Depends on:    
Bug Blocks: 1015    

Description Jacob Lifshay 2023-03-07 21:56:40 GMT
needed for memcpy f32x2 <-> f64x1 and u32x2 <-> f64x1 and similar.

* add fgrevi for fpr -> fpr byte swaps
* maybe replace fmv[f/t]g[s][.] with fgrev[f/t]g[s]i[.] for fpr <-> gpr byte swaps
* don't need grevlut functionality so grevi is sufficient
Comment 1 Jacob Lifshay 2023-03-08 04:13:01 GMT
I accidentally posted the comment to https://bugs.libre-soc.org/show_bug.cgi?id=1015#c3

reproduced here:
(In reply to Jacob Lifshay from bug #1015, comment #2)
> it occurred to me that we may want to submit fpr/gpr converts as a separate
> rfc from fpr/gpr moves/byte-swaps


I added fpr/gpr grev to a copy of int_fp_mv for review. fpr/gpr grev replaces fmvfg/fmvtg, which are now just assembler aliases:
https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=openpower/sv/int_fp_mv_replace_fmv_with_fgrev.mdwn;h=4b3a6900deafad6493b7b4a3cf1e4da91b05a994;hb=HEAD

It also occurred to me that there are no fp load/stores with byte swapping, we'll want to add those too, probably as a separate RFC.
Comment 2 Jacob Lifshay 2023-03-10 21:24:53 GMT
closing since now that I think about it more, transmutes between f64 <-> u32x2 and similar aren't that common, as well as this seems like something the ISA WG would reject.
Comment 3 Jacob Lifshay 2023-03-10 21:58:48 GMT
markos seems to like fgrev*:
https://libre-soc.org/irclog/%23libre-soc.2023-03-10.log.html#t2023-03-10T21:48:18