Bug 1079

Summary:	make LD/ST-with-update EXTRA3
Product:	Libre-SOC's first SoC	Reporter:	Luke Kenneth Casson Leighton <lkcl>
Component:	Source Code	Assignee:	Luke Kenneth Casson Leighton <lkcl>
Status:	CONFIRMED ---
Severity:	enhancement	CC:	ghostmansd, libre-soc-bugs
Priority:	---
Version:	unspecified
Hardware:	Other
OS:	Linux
See Also:	https://bugs.libre-soc.org/show_bug.cgi?id=1150
NLnet milestone:	NLnet.2022-08-107.ongoing	total budget (EUR) for completion of task and all subtasks:	2000
budget (EUR) for this task, excluding subtasks' budget:	2000	parent task for budget allocation:	1003
child tasks for budget allocation:		The table of payments (in EUR) for this task; TOML format:	ghostman=1000 lkcl=1000
Bug Depends on:	1080
Bug Blocks:

Description Luke Kenneth Casson Leighton 2023-05-08 17:51:03 BST

in order to support offsets by 1 register a little sacrificing is
needed, to be discussed under separate bugreport.

the decision - plan - is that registers RA RB RT and RS may be EXTRA3
but RB has to remain EXTRA2 because there is not enough space, and RB
does not matter.

action plan:

* DONE: define a new 2PM type (1P 2P 2PM)
* DONE: define EXTRA32 type
* TODO: identify LD/ST-Update instructions to change
* TODO: design new LDST-2PM-2S1D and LDST-2PM-1S2D format(s)
* TODO: update sv_analysis.py to match
* TODO: update CSV files to match
* TODO: ...
* TODO: ...


completion logs: 

https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=45cc5580

@@ -190,24 +190,32 @@ class SVPType(Enum):
     NONE = 0
     P1 = 1
     P2 = 2
+    P2M = 3 # for mixed EXTRA3/3/2 where MASK_SRC is RM[6,7,18]

  class SVEType(Enum):
+    """SVEType
+    * EXTRA2 : 0: [10,11] 1: [12,13] 2: [14,15] 3: [16,17] unused: [18]
+    * EXTRA3 : 0: [10,11,12] 1: [13,14,15] mask: [16,17,18] 
+    * EXTRA32: 0: [10,11,12] 1: [13,14,15] 2: [16,17] mask: [6,7,18]
+    """


https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=openpower/isatables/LDSTRM-2P-1S2D.csv;h=a4dd92ebf
https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=openpower/isatables/LDSTRM-2P-2S1D.csv;h=784bba67591

stwu,LDST_IMM,,2P,EXTRA2,EN,d:RA,s:RS,s:RA,0,RA_OR_ZERO,0,RS,0,0,0,RA

Comment 1 Luke Kenneth Casson Leighton 2023-05-27 13:11:11 BST

list of instructions: (matches clean patterns, see sv_analysis.py)

LDSTRM-2P-2S1D.csv:lwarx,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:ldx,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lwzx,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lbarx,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:ldarx,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lbzx,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lharx,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lhzx,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lwax,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lhax,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:ldbrx,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lwbrx,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lfsx,LDST_IDX,,2P,EXTRA2,EN,d:FRT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lfdx,LDST_IDX,,2P,EXTRA2,EN,d:FRT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lwzcix,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lhbrx,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lhzcix,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lbzcix,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lfiwax,LDST_IDX,,2P,EXTRA2,EN,d:FRT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:ldcix,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lfiwzx,LDST_IDX,,2P,EXTRA2,EN,d:FRT,s:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:ldux,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA;d:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lwzux,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA;d:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lbzux,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA;d:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lhzux,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA;d:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lwaux,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA;d:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lhaux,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA;d:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lfsux,LDST_IDX,,2P,EXTRA2,EN,d:FRT,s:RA;d:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:lfdux,LDST_IDX,,2P,EXTRA2,EN,d:FRT,s:RA;d:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:stdux,LDST_IDX,,2P,EXTRA3,EN,s:RS;s:RA;d:RA,s:RB,0,0,
LDSTRM-2P-2S1D.csv:stwux,LDST_IDX,,2P,EXTRA3,EN,s:RS;s:RA;d:RA,s:RB,0,0,
LDSTRM-2P-2S1D.csv:stbux,LDST_IDX,,2P,EXTRA3,EN,s:RS;s:RA;d:RA,s:RB,0,0,
LDSTRM-2P-2S1D.csv:sthux,LDST_IDX,,2P,EXTRA3,EN,s:RS;s:RA;d:RA,s:RB,0,0,
LDSTRM-2P-2S1D.csv:stfsux,LDST_IDX,,2P,EXTRA3,EN,s:FRS;s:RA;d:RA,s:RB,0,
LDSTRM-2P-2S1D.csv:stfdux,LDST_IDX,,2P,EXTRA3,EN,s:FRS;s:RA;d:RA,s:RB,0,
LDSTRM-2P-3S.csv:stdx,LDST_IDX,,2P,EXTRA2,EN,s:RS,s:RA,s:RB,0,
LDSTRM-2P-3S.csv:stwx,LDST_IDX,,2P,EXTRA2,EN,s:RS,s:RA,s:RB,0,
LDSTRM-2P-3S.csv:stbx,LDST_IDX,,2P,EXTRA2,EN,s:RS,s:RA,s:RB,0,
LDSTRM-2P-3S.csv:sthx,LDST_IDX,,2P,EXTRA2,EN,s:RS,s:RA,s:RB,0,
LDSTRM-2P-3S.csv:stdbrx,LDST_IDX,,2P,EXTRA2,EN,s:RS,s:RA,s:RB,0,
LDSTRM-2P-3S.csv:stwbrx,LDST_IDX,,2P,EXTRA2,EN,s:RS,s:RA,s:RB,0,
LDSTRM-2P-3S.csv:stfsx,LDST_IDX,,2P,EXTRA2,EN,s:FRS,s:RA,s:RB,0,
LDSTRM-2P-3S.csv:stfdx,LDST_IDX,,2P,EXTRA2,EN,s:FRS,s:RA,s:RB,0,
LDSTRM-2P-3S.csv:stwcix,LDST_IDX,,2P,EXTRA2,EN,s:RS,s:RA,s:RB,0,
LDSTRM-2P-3S.csv:sthbrx,LDST_IDX,,2P,EXTRA2,EN,s:RS,s:RA,s:RB,0,
LDSTRM-2P-3S.csv:sthcix,LDST_IDX,,2P,EXTRA2,EN,s:RS,s:RA,s:RB,0,
LDSTRM-2P-3S.csv:stbcix,LDST_IDX,,2P,EXTRA2,EN,s:RS,s:RA,s:RB,0,
LDSTRM-2P-3S.csv:stfiwx,LDST_IDX,,2P,EXTRA2,EN,s:FRS,s:RA,s:RB,0,
LDSTRM-2P-3S.csv:stdcix,LDST_IDX,,2P,EXTRA2,EN,s:RS,s:RA,s:RB,0,
LDSTRM-2P-3S.csv:stwcx,LDST_IDX,,2P,EXTRA2,EN,s:RS;d:CR0,s:RA,s:RB,0,
LDSTRM-2P-3S.csv:stdcx,LDST_IDX,,2P,EXTRA2,EN,s:RS;d:CR0,s:RA,s:RB,0,
LDSTRM-2P-3S.csv:stbcx,LDST_IDX,,2P,EXTRA2,EN,s:RS;d:CR0,s:RA,s:RB,0,
LDSTRM-2P-3S.csv:sthcx,LDST_IDX,,2P,EXTRA2,EN,s:RS;d:CR0,s:RA,s:RB,0,

Comment 2 Luke Kenneth Casson Leighton 2023-05-27 13:23:59 BST

this is awkward:

class BaseRM(_Mapping):
    _: _Field = range(24)
    mmode: _Field = (0,)
    mask: _Field = range(1, 4)
    elwidth: _Field = range(4, 6)
    ewsrc: _Field = range(6, 8)
    subvl: _Field = range(8, 10)
    mode: Mode.remap(range(19, 24))
--> alternative_smask: _Field = (6,7,19) <- special-case: LDST_IDX
    smask: _Field = range(16, 19)        <- everything else (not LDST_IDX)
    extra: Extra.remap(range(10, 19))
    extra2: Extra2.remap(range(10, 19))
    extra3: Extra3.remap(range(10, 19))

now, by a happy coincidence - i think - it is possible to hit this:

   * EXTRA2 : 0: [10,11] 1: [12,13] 2: [14,15] 3: [16,17] unused: [18]
   * EXTRA3 : 0: [10,11,12] 1: [13,14,15] mask: [16,17,18] 
   * EXTRA32: 0: [10,11,12] 1: [13,14,15] 2: [16,17] mask: [6,7,18]

with this:

*    RT - BaseRM.extra3[0] - bits 10,11,12
*    RA - BaseRM.extra3[1] - bits 13,14,15
*    RB - BaseRM.extra2[3] - bits 16,17

hooray!  yes.

Comment 3 Luke Kenneth Casson Leighton 2023-05-27 13:25:43 BST

(In reply to Luke Kenneth Casson Leighton from comment #1)

> LDSTRM-2P-2S1D.csv:stdux,LDST_IDX,,2P,EXTRA3,EN,s:RS;s:RA;d:RA,s:RB,0,0,
> LDSTRM-2P-2S1D.csv:stwux,LDST_IDX,,2P,EXTRA3,EN,s:RS;s:RA;d:RA,s:RB,0,0,
> LDSTRM-2P-2S1D.csv:stbux,LDST_IDX,,2P,EXTRA3,EN,s:RS;s:RA;d:RA,s:RB,0,0,
> LDSTRM-2P-2S1D.csv:sthux,LDST_IDX,,2P,EXTRA3,EN,s:RS;s:RA;d:RA,s:RB,0,0,
> LDSTRM-2P-2S1D.csv:stfsux,LDST_IDX,,2P,EXTRA3,EN,s:FRS;s:RA;d:RA,s:RB,0,
> LDSTRM-2P-2S1D.csv:stfdux,LDST_IDX,,2P,EXTRA3,EN,s:FRS;s:RA;d:RA,s:RB,0,

these are a bug, they should also be the new 2PM type, using EXTRA32

Comment 4 Dmitry Selyutin 2023-05-28 17:53:52 BST

The recent changes (45cc558041b0a52ed1e35c915c5ac513a3d447d1) broke sv_binutils. Fixed in master: https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=f7e400ca6a9607b7d03d4babfdb2da6f7f5d79df.

Comment 5 Luke Kenneth Casson Leighton 2023-08-16 19:59:42 BST

(In reply to Dmitry Selyutin from comment #4)
> The recent changes (45cc558041b0a52ed1e35c915c5ac513a3d447d1) broke
> sv_binutils.

not a surprise, the SV CSV files generated by sv_analysis.py
were just plain wrong

> Fixed in master:
> https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;
> h=f7e400ca6a9607b7d03d4babfdb2da6f7f5d79df.

great.