| Summary: | Fix instructions which have extra conflicts | ||
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| Product: | Libre-SOC's first SoC | Reporter: | Dmitry Selyutin <ghostmansd> |
| Component: | Source Code | Assignee: | Luke Kenneth Casson Leighton <lkcl> |
| Status: | RESOLVED FIXED | ||
| Severity: | enhancement | CC: | libre-soc-bugs |
| Priority: | --- | ||
| Version: | unspecified | ||
| Hardware: | PC | ||
| OS: | Windows | ||
| NLnet milestone: | --- | total budget (EUR) for completion of task and all subtasks: | 0 |
| budget (EUR) for this task, excluding subtasks' budget: | 0 | parent task for budget allocation: | |
| child tasks for budget allocation: | The table of payments (in EUR) for this task; TOML format: | ||
| Bug Depends on: | |||
| Bug Blocks: | 1093 | ||
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Description
Dmitry Selyutin
2023-05-31 18:44:07 BST
I've added all broken instructions into tests: https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=0e9a5694dfe415126a8e1a32456c1f801bfebc03 Luke, I've assigned this to you since you did the actual fix and I only did some bits of analysis and discovered the issue. (In reply to Dmitry Selyutin from comment #2) > Luke, I've assigned this to you since you did the actual fix and I only did > some bits of analysis and discovered the issue. i think i can work it out, the Idx0-3 need to have to be filtered by "None", which at the moment is getting confused with "Idx0". i need to investigate more. i found it.
* "in1/in2/in3/CR in" are all (implicitly) of type SelType.SRC
* "out/out2/CR out" are all SelType.DST
despite the register RA sometimes being both. i added this:
for (reg, seltype, idx) in extra(reg.alias):
+ if keytype != seltype: # only check SRC-to-SRC and DST-to-DST
+ continue
and the problem goes away
https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=de0ebb3
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