Bug 1134

Summary: implement fminmax in ieee754fpu/soc
Product: Libre-SOC's first SoC Reporter: Jacob Lifshay <programmerjake>
Component: ALU (including IEEE754 16/32/64-bit FPU)Assignee: Jacob Lifshay <programmerjake>
Status: CONFIRMED ---    
Severity: enhancement CC: libre-soc-bugs, programmerjake
Priority: ---    
Version: unspecified   
Hardware: PC   
OS: Linux   
See Also: https://bugs.libre-soc.org/show_bug.cgi?id=1247
NLnet milestone: --- total budget (EUR) for completion of task and all subtasks: 0
budget (EUR) for this task, excluding subtasks' budget: 0 parent task for budget allocation:
child tasks for budget allocation: The table of payments (in EUR) for this task; TOML format:
Bug Depends on: 1135    
Bug Blocks: 1025    

Description Jacob Lifshay 2023-08-09 23:59:21 BST
3 stages to be assembled into a 1-stage pipeline:

1. input unpacking & adjust for magnitude comparison (mostly abs)
    not using existing unpack stage since that computes unbiased exponent
    which is unnecessary and undesired.
2. compare inputs and nan-detection
3. mux output with optional nan-quieting

https://bugs.libre-soc.org/show_bug.cgi?id=1135#c20
since the FPSCR classes task is quite small, I think we should allocate the budget for that task through this task.