| Summary: | Libre-SOC git repos summary | ||
|---|---|---|---|
| Product: | Libre-SOC's first SoC | Reporter: | Andrey Miroshnikov <andy.miroshnikov> |
| Component: | Documentation | Assignee: | shriya.sharma |
| Status: | CONFIRMED --- | ||
| Severity: | enhancement | CC: | andy.miroshnikov, libre-soc-bugs, lkcl |
| Priority: | --- | ||
| Version: | unspecified | ||
| Hardware: | PC | ||
| OS: | Linux | ||
| URL: | https://libre-soc.org/HDL_workflow/git_repos_summary/ | ||
| See Also: | https://bugs.libre-soc.org/show_bug.cgi?id=1126 | ||
| NLnet milestone: | --- | total budget (EUR) for completion of task and all subtasks: | 0 |
| budget (EUR) for this task, excluding subtasks' budget: | 0 | parent task for budget allocation: | |
| child tasks for budget allocation: | The table of payments (in EUR) for this task; TOML format: | ||
|
Description
Andrey Miroshnikov
2023-08-22 12:33:16 BST
My suggestions to Shriya were: - Focus on the most important repos for the moment (libreriscv, soc, openpower-isa for now, more to come) - Only write brief summary (a few sentences at most) to keep the page readable (and make it more likely people will actually read it) Commits to the page so far: https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff;h=c3422f15281baa517ee71b16e6d8f0f15115c576 https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff;h=76d5531c1b600964273b7ab4587026fef2f6b1e3 https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff;h=63992374932e6ec174628307493d79fb0803f8be |