Bug 1165

Summary:	Adding documented code examples for nMigen
Product:	Libre-SOC's first SoC	Reporter:	Andrey Miroshnikov <andy.miroshnikov>
Component:	Documentation	Assignee:	Andrey Miroshnikov <andy.miroshnikov>
Status:	CONFIRMED ---
Severity:	enhancement	CC:	libre-soc-bugs, lkcl, shriya.sharma
Priority:	---
Version:	unspecified
Hardware:	PC
OS:	Linux
URL:	https://libre-soc.org/docs/learning_nmigen/
See Also:	https://bugs.libre-soc.org/show_bug.cgi?id=1164 https://bugs.libre-soc.org/show_bug.cgi?id=1126 https://bugs.libre-soc.org/show_bug.cgi?id=1122
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Description Andrey Miroshnikov 2023-09-19 16:55:59 BST

As a learning exercise with Shriya, I created a repo containing nMigen code examples that a beginner could start running after setting up a Libre-SOC environment.

The intention of the code:
- Simple enough to understand
- Generates verilog output
- Generates gtkw trace file for nicer gtkwave output

Examples will be taken from existing projects (nMigen, etc.) or newly written.

Comment 1 Luke Kenneth Casson Leighton 2023-09-19 17:55:09 BST

i added the URL where all of the tutorials and everything i could find
is located. please remember UNDER NO CIRCUMSTANCES quote or reference
any Trademark-violating work.

Comment 2 Andrey Miroshnikov 2023-09-24 14:20:29 BST

First commit, added up_counter.py example from the nmigen gitlab repo, modified to include gtkw file generation (for pretty gtkwave traces).
https://gitlab.com/nmigen/nmigen/-/tree/master/docs/_code
https://git.libre-soc.org/?p=nmigen-examples.git;a=commitdiff;h=472beee1b20ada92578e31b446b4d81c2d88a07c

There's enough to run the example, but I haven't added the details to the guide that I'm planning to.