Bug 1176

Summary: implement CR-Based (not CR *FIELD* based) SVP64 in ISACaller (sv.mcrxr, sv.mtcr etc)
Product: Libre-SOC's first SoC Reporter: Luke Kenneth Casson Leighton <lkcl>
Component: Source CodeAssignee: Luke Kenneth Casson Leighton <lkcl>
Status: CONFIRMED ---    
Severity: enhancement CC: libre-soc-bugs
Priority: ---    
Version: unspecified   
Hardware: Other   
OS: Linux   
NLnet milestone: --- total budget (EUR) for completion of task and all subtasks: 0
budget (EUR) for this task, excluding subtasks' budget: 0 parent task for budget allocation:
child tasks for budget allocation: The table of payments (in EUR) for this task; TOML format:
Bug Depends on: 1175    
Bug Blocks: 952, 961, 1056    

Description Luke Kenneth Casson Leighton 2023-09-27 08:50:55 BST
it is in the SV Spec but needs implementing

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 125 # Move Condition Register Field
 126 
 127 XL-Form
 128 
 129 * mcrf BF,BFA