Bug 1181

Summary: ask the ISA WG to produce a list of which instructions are needed by SFS and SFFS in 64-bit mode
Product: Libre-SOC's first SoC Reporter: Jacob Lifshay <programmerjake>
Component: SpecificationAssignee: Luke Kenneth Casson Leighton <lkcl>
Status: CONFIRMED ---    
Severity: enhancement CC: libre-soc-isa
Priority: ---    
Version: unspecified   
Hardware: PC   
OS: Linux   
See Also: https://bugs.libre-soc.org/show_bug.cgi?id=1035
https://bugs.libre-soc.org/show_bug.cgi?id=1120
NLnet milestone: --- total budget (EUR) for completion of task and all subtasks: 0
budget (EUR) for this task, excluding subtasks' budget: 0 parent task for budget allocation:
child tasks for budget allocation: The table of payments (in EUR) for this task; TOML format:

Description Jacob Lifshay 2023-10-10 19:17:41 BST 
it isn't clear what instructions are needed by SFS and SFFS in 64-bit mode, I think we should submit a rfc or something to clarify that. e.g. are 128-bit atomics required by 64-bit mode? (it would be nice if they are since gcc/clang enable them by default on powerpc64le-linux-gnu; also since once cache line pinning is implemented, reading/writing 128-bits isn't too horribly difficult) what about bpermd or pdep/pext?

I also think BE-mode should be optional for 64-bit cpus.

imo the best option is to introduce new SFS64 and SFFS64 compliancy levels.