Bug 1212

Introduction (part of MOU)

This project is to enhance binutils tools to continue the autogenerated support for the RISC-V, Power and other ISAs, and to also support Simple-V Vectorisation capabilities. It will directly support the ISA Expansion project https://libre-soc.org/nlnet_2023_simplev_riscv for which a separate grant application has been made, and will build on learnings from binutils developed for POWER ISA and SVP64/Power.

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Task list

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# libopid: SVP64 support

libopid currently supports major parts of vanilla PPC assembly and disassembly (at least pure 32-bit instructions we currently have enumerated in openpower-isa repository). When we have everything autogenerated, it's time to make libopid support SVP64 instructions as well.

Budget: 10000
URL: https://bugs.libre-soc.org/show_bug.cgi?id=1200

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# binutils: switch PPC code to libopid

binutils code base has its own implementation for PPC SVP64 extensions support. This leads to code duplication, inability to follow the specs and complicates the maintenance. Instead of code duplication, we suggest to switch to libopid, C library, once SVP64 support is completed.

Budget: 10000
URL: https://bugs.libre-soc.org/show_bug.cgi?id=1201

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# insndb: RISC-V support

insndb is one of our most fundamental components regarding assembly and disassembly. However, it currently supports only PPC architecture, lacking support for RISC-V architecture.

Budget: 10000
URL: https://bugs.libre-soc.org/show_bug.cgi?id=1255

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# libopid: RISC-V support

libopid is currently capable of generating the assembly/disassembly for PPC architecture. The support for RISC-V architecture must be introduced.

Budget: 10000
URL: https://bugs.libre-soc.org/show_bug.cgi?id=1256

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# insndb: introduce human-readable fields format

Currently we hard-code all possible specifications and field mappings. It's difficult to manage these and keep them in sync with the documentation. We must introduce some format to generate the documentation and the code instead.

Budget: 15000
URL: https://bugs.libre-soc.org/show_bug.cgi?id=1199

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# maintenance: decouple insndb and libopid

Currently insndb and libopid are parts of our openpower-isa repository. However, this is inconvenient for other projects which will rely on these tools (most notably binutils). Plus, keeping these into openpower-isa makes no sense once we support RISC-V architecture. The task is complicated by the fact that libopid and insndb make use of other openpower-isa components; each of these uses must be addressed separately.

Budget: 5000
URL: https://bugs.libre-soc.org/show_bug.cgi?id=1202

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# tests: cross-check PPC Simple-V assembly between binutils and insndb

We don't have tests for binutils which check the most essential SVP64. At least assembly and disassembly as present in openpower-isa tests must be covered.

Budget: 10000
URL: https://bugs.libre-soc.org/show_bug.cgi?id=1203

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# insndb: support PPC instruction aliases

insndb currently lacks support for instruction aliases. At least the instructions mentioned as aliases for vanilla PPC must be supported so that both our code and binutils can make use of it.

Budget: 5000
URL: https://bugs.libre-soc.org/show_bug.cgi?id=1140

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# administrative activities

Any task includes activities related to issue tracking and monitoring. This includes not only organizing the tasks, but also providing comments to all subtasks, participating in dicussions, budget synchronization and similar activities which rather fit the main task than any of the standalone subtasks.

Budget: 5000
URL: https://bugs.libre-soc.org/show_bug.cgi?id=1257

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# conferences and papers

Participation in conferences and other public events, submitting papers and articles, and other activities of that kind.

Budget: 5000
URL: https://bugs.libre-soc.org/show_bug.cgi?id=1258