Bug 125

Summary: need NaN unboxing operation
Product: Libre-SOC's first SoC Reporter: Jacob Lifshay <programmerjake>
Component: ALU (including IEEE754 16/32/64-bit FPU)Assignee: Luke Kenneth Casson Leighton <lkcl>
Status: RESOLVED INVALID    
Severity: enhancement CC: libre-soc-bugs
Priority: ---    
Version: unspecified   
Hardware: All   
OS: All   
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Bug Blocks: 48    

Description Jacob Lifshay 2019-07-28 23:44:00 BST
RISC-V's NaN unboxing operation requires checking that the extra msb bits are all 1 and using the canonical NaN instead if they aren't