Bug 214

Summary: ISAMUX/NS Standard writeup needed
Product: Libre-SOC's first SoC Reporter: Luke Kenneth Casson Leighton <lkcl>
Component: SpecificationAssignee: Alain D D Williams <addw>
Status: RESOLVED FIXED    
Severity: enhancement CC: libre-soc-bugs, lkcl
Priority: ---    
Version: unspecified   
Hardware: Other   
OS: Linux   
URL: https://libre-soc.org/openpower/isans_letter/
NLnet milestone: NLNet.2019.10.046.Standards total budget (EUR) for completion of task and all subtasks: 2500
budget (EUR) for this task, excluding subtasks' budget: 2500 parent task for budget allocation: 174
child tasks for budget allocation: The table of payments (in EUR) for this task; TOML format:
addw = {amount=1250, submitted=2022-08-18, paid=2022-08-25} lkcl = { amount = 1250, submitted = 2022-06-25, paid = 2022-07-21 }
Bug Depends on:    
Bug Blocks: 174    

Description Luke Kenneth Casson Leighton 2020-03-09 22:14:58 GMT 
The ISAMUX/NS Standard, applied to POWER ISA, needs to be written up in a form suitable for proposal to the OpenPOWER Foundation.  Followthrough to adoption included.

See informal writeup:
https://libre-riscv.org/isa_conflict_resolution/isamux_isans/
Comment 2 Alain D D Williams 2020-08-18 20:10:25 BST 
This has, at long last, been started.
Comment 3 Luke Kenneth Casson Leighton 2020-08-22 17:57:45 BST 
alain just sone notes from our conversation: there are 2 aspects.

1. PCR binary encoded range (6 bits) to be proposed, and for libresoc to request "0b000001"

this places the CPU into "libresoc compatibility mode" 

2. reservation and use of some MSR bits.  this for *internal* LibreSOC usage.

the OpenPOWER Foundation needs to be requested officially to reserve (1) as part of the spec.

the OpenPOWER Foundation needs to be *notified* of our intent (2) but given that it is ONLY enabled in PCR-sets-LibreSOC-Compatible-mode it is NOT necessary to request authorisation for it, NOR to request that it be included in the OpenPOWER spec.

however they still need to review (2) to make sure that it does not interfere with future plans for MSR.