Bug 292

Summary: implement multi-way read/write 6600 signals
Product: Libre-SOC's first SoC Reporter: Luke Kenneth Casson Leighton <lkcl>
Component: Source CodeAssignee: Luke Kenneth Casson Leighton <lkcl>
Status: PAYMENTPENDING FIXED    
Severity: enhancement CC: libre-soc-bugs
Priority: ---    
Version: unspecified   
Hardware: PC   
OS: Linux   
NLnet milestone: NLnet.2019.02.012 total budget (EUR) for completion of task and all subtasks: 600
budget (EUR) for this task, excluding subtasks' budget: 600 parent task for budget allocation: 81
child tasks for budget allocation: The table of payments (in EUR) for this task; TOML format:
lkcl={amount=600,paid=2020-04-28}

Description Luke Kenneth Casson Leighton 2020-04-24 15:36:43 BST 
https://libre-soc.org/3d_gpu/architecture/6600scoreboard/600x-compunit_multi_rw.jpg
https://libre-soc.org/3d_gpu/architecture/6600scoreboard/600x-dependence_cell_multi_pending.jpg

the original 6600 scoreboard is single-signal request-ack protection
for multiple reads on the regfile.  overporting is then added so that
multiple batches of ALUs can simultaneously read (and write) to the
regfile.

we cannot do massive-way regfile porting.

additionally we need to do *different* regfiles for POWER: one of
these is the "Branch Control" Regfile, including CR0, CTR and other
conditional registers.

therefore it becomes more important to have fine-grain control over
the regfile, meaning that multiple go-read/req and go-write/req
wires are needed per FunctionUnit.