Bug 473

Summary: glossary entries for isa manual
Product: Libre-SOC's first SoC Reporter: Luke Kenneth Casson Leighton <lkcl>
Component: SpecificationAssignee: Alain D D Williams <addw>
Status: CONFIRMED ---    
Severity: enhancement CC: libre-soc-isa
Priority: ---    
Version: unspecified   
Hardware: PC   
OS: Linux   
NLnet milestone: NLNet.2019.10.046.Standards total budget (EUR) for completion of task and all subtasks: 0
budget (EUR) for this task, excluding subtasks' budget: 0 parent task for budget allocation: 174
child tasks for budget allocation: The table of payments (in EUR) for this task; TOML format:

Description Luke Kenneth Casson Leighton 2020-08-26 09:26:58 BST 
https://git.libre-soc.org/?p=libresoc-isa-manual.git;a=blob;f=powerpc-add/src/glossary.tex;h=0ddc36e1ae9687a801731b9c65691f20a32a4d7c;hb=09020a5d1e22d10c3166dfdac23e19a5db6e7c92

phase-aware function unit

a function unit (pipeline or FSM) that specifically monitors the production of a result from start (receipt of operands) to finish (output of result).  The CDC6600 term for the same is "Computation Unit". A phase-aware function unit is essential for out-of-order execution to avoid data corruption.

MSB0

LSB0