Bug 52

Summary: software simulator compliant with the latest SimpleV Vectorisation Standard (SVP64)
Product: Libre-SOC's first SoC Reporter: Luke Kenneth Casson Leighton <lkcl>
Component: Source CodeAssignee: Luke Kenneth Casson Leighton <lkcl>
Status: CONFIRMED ---    
Severity: enhancement CC: libre-soc-bugs, programmerjake
Priority: ---    
Version: unspecified   
Hardware: PC   
OS: Linux   
URL: https://libre-soc.org/openpower/sv/implementation/
See Also: https://bugs.libre-soc.org/show_bug.cgi?id=241
NLnet milestone: NLnet.2019.02.012 total budget (EUR) for completion of task and all subtasks: 0
budget (EUR) for this task, excluding subtasks' budget: 0 parent task for budget allocation:
child tasks for budget allocation: The table of payments (in EUR) for this task; TOML format:
Bug Depends on: 170, 104, 105, 232    
Bug Blocks: 191    

Description Luke Kenneth Casson Leighton 2019-03-21 11:29:25 GMT

    
Comment 1 Luke Kenneth Casson Leighton 2021-05-13 21:24:54 BST
ISACaller - the python-based software simulator - is where these
features are being (successfully) implemented.