Bug 525

Summary: add dcbz pseudocode
Product: Libre-SOC's first SoC Reporter: Luke Kenneth Casson Leighton <lkcl>
Component: Source CodeAssignee: Luke Kenneth Casson Leighton <lkcl>
Status: CONFIRMED ---    
Severity: enhancement CC: libre-soc-bugs
Priority: ---    
Version: unspecified   
Hardware: PC   
OS: Linux   
NLnet milestone: NLNet.2019.10.043.Wishbone total budget (EUR) for completion of task and all subtasks: 0
budget (EUR) for this task, excluding subtasks' budget: 0 parent task for budget allocation:
child tasks for budget allocation: The table of payments (in EUR) for this task; TOML format:
Bug Depends on:    
Bug Blocks: 383, 450, 491    

Description Luke Kenneth Casson Leighton 2020-11-04 18:10:48 GMT
the following pseudocode adapted from p850 v3.0B needs to be added to the
openpower isa pages git.libre-soc.org, probably fixedstore.mdwn for now

# Data Cache Block set to Zero

X-Form

* dcbz RA,RB

Pseudo-code:


    if RA = 0 then b <= 0
    else           b <- (RA)
    EA <- b + (RB)
    n <- block size (bytes)
    m <- log2(n)
    ea <- EA[0:63-m] || [0]*m
    m8 <- m*8
    MEM(ea, n) <- [0]*m8

Special Registers Altered:

    None



a rebuild using pywriter (see top-level Makefile) is required after adding
the pseudocode.
Comment 1 Luke Kenneth Casson Leighton 2020-11-04 19:23:12 GMT
i took a look at this and i can't work out what the pseudocode is actually
supposed to do.  i've asked on openhdl-cores for advice.
Comment 2 Luke Kenneth Casson Leighton 2020-11-05 11:26:56 GMT
heard from Ben and Paul, *we* choose the block size (sigh). 

http://lists.mailinglist.openpowerfoundation.org/pipermail/openpower-hdl-cores/2020-November/000196.html