| Summary: | parameter needed in coriolis2 to specify individually which clocks are to have a Clock Tree | ||
|---|---|---|---|
| Product: | Libre-SOC's first SoC | Reporter: | Luke Kenneth Casson Leighton <lkcl> |
| Component: | Hardware Layout | Assignee: | Jean-Paul Chaput <Jean-Paul.Chaput> |
| Status: | CONFIRMED --- | ||
| Severity: | enhancement | CC: | libre-soc-bugs |
| Priority: | --- | ||
| Version: | unspecified | ||
| Hardware: | PC | ||
| OS: | Linux | ||
| See Also: | https://bugs.libre-soc.org/show_bug.cgi?id=155 | ||
| NLnet milestone: | NLNet.2019.02.029.Coriolis2 | total budget (EUR) for completion of task and all subtasks: | 0 |
| budget (EUR) for this task, excluding subtasks' budget: | 0 | parent task for budget allocation: | |
| child tasks for budget allocation: | The table of payments (in EUR) for this task; TOML format: | ||
| Bug Depends on: | |||
| Bug Blocks: | 199, 383 | ||
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Description
Luke Kenneth Casson Leighton
2020-11-10 13:20:37 GMT
Jean-Paul: index f1fc2f61..9877199d 100644 --- a/cumulus/src/plugins/alpha/chip/corona.py +++ b/cumulus/src/plugins/alpha/chip/corona.py + @property + def coronaCks ( self ): + if self.corona.conf.useClockTree: return self.corona.conf.coronaCks + return [] + this would be parameteriseable in coriolis2/settings.py (or chipConf dictionary) to allow explicit naming of clocks that were to be an H-Tree. in the ls180 case these would be: * JTAG_TCK * PLL_OUT_CLK they would *NOT* be: * JTAG_TCK * PLL_OUT_CLK * SYS_CLK but, note: the IORing clocks would be: * JTAG_TCK * SYS_CLK the H-Tree clocks *are not the same as* the IOring clocks. this i believe is what we need. is this easily achievable by simply modifying corona.Side class coronaCks function to return a user-defined list? if so then i could try that. |