Bug 642

Summary: reduce width of input records by sending only required bits of state / data
Product: Libre-SOC's first SoC Reporter: Luke Kenneth Casson Leighton <lkcl>
Component: Source CodeAssignee: Luke Kenneth Casson Leighton <lkcl>
Status: CONFIRMED ---    
Severity: enhancement CC: libre-soc-bugs
Priority: ---    
Version: unspecified   
Hardware: PC   
OS: Linux   
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Description Luke Kenneth Casson Leighton 2021-05-11 11:40:58 BST
example, in ldst input record:

                  ('msr', 64), # TODO: a lot less bits.  only need PR

also in MMU, and other locations: frequently it is only a few bits
that are needed.  strictly speaking, MSR should be subdivided into
its own regfile by "bits"