| Summary: | calculate signal values in a Topological Ordering | ||
|---|---|---|---|
| Product: | Libre-SOC's second ASIC | Reporter: | Jacob Lifshay <programmerjake> |
| Component: | source code | Assignee: | wielgusmikolaj |
| Status: | CONFIRMED --- | ||
| Severity: | enhancement | CC: | libre-soc-bugs, lkcl, wielgusmikolaj |
| Priority: | Lowest | ||
| Version: | unspecified | ||
| Hardware: | Other | ||
| OS: | Linux | ||
| NLnet milestone: | --- | total budget (EUR) for completion of task and all subtasks: | 0 |
| budget (EUR) for this task, excluding subtasks' budget: | 0 | parent task for budget allocation: | |
| child tasks for budget allocation: | The table of payments (in EUR) for this task; TOML format: | ||
| Bug Depends on: | |||
| Bug Blocks: | 665 | ||
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Description
Jacob Lifshay
2021-12-23 18:33:19 GMT
nice idea, bear in mind it is an optimisation (priority set to low) even detecting feedback loops is slightly problematic when SR latches are involved. |