Bug 780

Summary: Add / enhance / document / relicense Aquila LPC slave core
Product: Libre-SOC's first SoC Reporter: tpearson
Component: Source CodeAssignee: Luke Kenneth Casson Leighton <lkcl>
Status: CONFIRMED ---    
Severity: enhancement CC: libre-soc-bugs
Priority: ---    
Version: unspecified   
Hardware: Other   
OS: Other   
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Description tpearson 2022-03-01 21:30:56 GMT 
COMPLETED

- Added the Aquila LPC slave DMA-capable core to the LibreSoC Microwatt tree
   - Added a fourth DMA master to Microwatt core
 - Enabled on ECP5-85 Arctic Tern boards
 - Extended for true 64-bit DMA (required by Microwatt's 64-bit busses)
 - Documented core (initial datasheet)
 - Verified synthesis / PAR and resource usage
 - Relicensed as LGPLv3+

TODO

- Verify extended version works on Arctic Tern hardware with POWER9 host (estimated timeframe late March 2022)
Comment 1 tpearson 2022-03-06 20:39:06 GMT 
CURRENT STATUS
- Added the Pinyon dual port block RAM interface / specification
- Moved LPC slave buffers from ECP5 primitives to Pinyon RAMs