Bug 913

Summary: change PLRU in plru2.py to allow putting state in sram
Product: Libre-SOC's first SoC Reporter: Jacob Lifshay <programmerjake>
Component: Source CodeAssignee: Jacob Lifshay <programmerjake>
Status: CONFIRMED ---    
Severity: enhancement CC: libre-soc-bugs, programmerjake
Priority: ---    
Version: unspecified   
Hardware: Other   
OS: Linux   
See Also: https://bugs.libre-soc.org/show_bug.cgi?id=909
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Description Jacob Lifshay 2022-08-26 18:04:30 BST 
https://bugs.libre-soc.org/show_bug.cgi?id=909#c5

> actually, i want to modify PLRU's API somewhat so you can have a sram of
> PLRU states and just one PLRU circuit rather than a bunch of dffs and PLRUs.
> the sram would need 1 clocked write port and one combinatorial read port
> (unless you want to wait an extra cycle), it would be external to PLRU.