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Bug 191 depends on 152 bugs:
view as bug list-
191:
NLNet 2019 Core Proposal 2019-02-012
[RESOLVED FIXED; assigned to lkcl]
-
22:
FPGA proof-of-concept test needed
[CONFIRMED; assigned to lkcl]
-
2:
Define and find hard macros for all Shakti M-Class Interfaces
[CONFIRMED; assigned to lkcl]
-
1:
I2C Interface
[CONFIRMED; assigned to lkcl]
-
3:
I2S interface
[CONFIRMED; assigned to lkcl]
-
4:
FlexBus Interface
[CONFIRMED; assigned to lkcl]
-
5:
RGB/TTL Interface
[CONFIRMED; assigned to lkcl]
-
6:
SPI interface needed
[CONFIRMED; assigned to lkcl]
-
7:
SD/MMC and eMMC interface needed
[CONFIRMED; assigned to lkcl]
-
8:
Pinmux needed
[CONFIRMED; assigned to lkcl]
-
24:
pinmux memory map
[IN_PROGRESS; assigned to lkcl]
-
25:
pinmux generate c header files
[CONFIRMED; assigned to lkcl]
-
26:
pinmux default mux values
[IN_PROGRESS; assigned to lkcl]
-
27:
pinmux synchroniser clocks
[CONFIRMED; assigned to lkcl]
-
30:
ULPI / UTMI needed into pinmux for code-generation
[CONFIRMED; assigned to lkcl]
-
31:
need diff pair pin on pinmux
[CONFIRMED; assigned to lkcl]
-
33:
pinmux verification of rules etc.
[CONFIRMED; assigned to lkcl]
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34:
pinmux add sdram interface
[IN_PROGRESS; assigned to lkcl]
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35:
pinmux add vme peripheral
[CONFIRMED; assigned to lkcl]
-
20:
pinmux needs to auto-generate bsv Makefile
[RESOLVED FIXED; assigned to lkcl]
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28:
pinmux dedicated peripherals code-gen needed
[RESOLVED FIXED; assigned to lkcl]
-
50:
nmigen pinmux
[RESOLVED FIXED; assigned to lkcl]
-
846:
Pinmux Pinspec Interconnect Auto-Generation
[CONFIRMED; assigned to andy.miroshnikov]
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746:
I2C needs an Open Drain IO Pad
[RESOLVED FIXED; assigned to staf]
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750:
Convert pinmux gpio, jtag-block bitmap diagrams to svg vector
[RESOLVED FIXED; assigned to veerakumar.r]
-
762:
Peripheral Pin Muxing Development
[RESOLVED FIXED; assigned to andy.miroshnikov]
(*)
-
763:
Work on I/O Core Pad JTAG Tests
[RESOLVED FIXED; assigned to lkcl]
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764:
Documentation of I/O Core/Pad JTAG Tests
[RESOLVED FIXED; assigned to andy.miroshnikov]
-
846:
Pinmux Pinspec Interconnect Auto-Generation
[CONFIRMED; assigned to andy.miroshnikov]
-
24:
pinmux memory map
[IN_PROGRESS; assigned to lkcl]
-
9:
RGMII (Gigabit Ethernet) Interface
[CONFIRMED; assigned to lkcl]
-
10:
AXI Bridge Interface
[CONFIRMED; assigned to lkcl]
-
11:
Wishbone Interface / Bridge
[CONFIRMED; assigned to lkcl]
-
12:
AC97 Audio Interface
[CONFIRMED; assigned to lkcl]
-
13:
PWM Interface needed
[CONFIRMED; assigned to lkcl]
-
14:
EINT interface needed (PLIC)
[CONFIRMED; assigned to lkcl]
-
15:
GPIO interface needed
[CONFIRMED; assigned to lkcl]
-
17:
IOMMU needed
[CONFIRMED; assigned to lkcl]
-
18:
PDM audio needed
[CONFIRMED; assigned to lkcl]
-
21:
LPDDR3/LPDDR4 needed
[CONFIRMED; assigned to lkcl]
-
1:
I2C Interface
[CONFIRMED; assigned to lkcl]
-
206:
Implement branch prediction
[CONFIRMED; assigned to lkcl]
-
81:
implement 6600-style "precise" out-of-order scoreboard
[RESOLVED FIXED; assigned to lkcl]
-
87:
investigate scoreboard global write pending change
[CONFIRMED; assigned to lkcl]
-
88:
investigate multi-issue (superscalar)
[CONFIRMED; assigned to lkcl]
-
92:
Implement in order instruction retire refcounting
[CONFIRMED; assigned to lkcl]
-
338:
CompUnitALU needs go_die to be wired to ALU shadow mask
[CONFIRMED; assigned to lkcl]
-
86:
6600-style preliminary investigation
[PAYMENTPENDING FIXED; assigned to lkcl]
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94:
implement load/store memory dependency matrix
[RESOLVED FIXED; assigned to lkcl]
-
95:
implement shadowing for use in precise exceptions, branch speculation, predication and WaW ordering
[PAYMENTPENDING FIXED; assigned to lkcl]
-
87:
investigate scoreboard global write pending change
[CONFIRMED; assigned to lkcl]
-
186:
Create decoder for SOC: Power ISA
[RESOLVED FIXED; assigned to lkcl]
-
211:
formal proof of PowerDecoder stage2 needed
[CONFIRMED; assigned to lkcl]
-
189:
Create partitioned right shift using the existing partitioned left shift
[PAYMENTPENDING FIXED; assigned to mtnolan2640]
-
261:
power_enums.py to read SPRs from sprs.csv
[RESOLVED FIXED; assigned to lkcl]
-
271:
SigDecode in power_fields has extra spurious fields
[RESOLVED FIXED; assigned to mtnolan2640]
-
211:
formal proof of PowerDecoder stage2 needed
[CONFIRMED; assigned to lkcl]
-
412:
set up litex for peripherals and linking to core
[PAYMENTPENDING FIXED; assigned to lkcl]
-
2:
Define and find hard macros for all Shakti M-Class Interfaces
[CONFIRMED; assigned to lkcl]
-
51:
Virtual Memory Management system
[CONFIRMED; assigned to lkcl]
-
491:
MMU Function Unit needed
[RESOLVED FIXED; assigned to lkcl]
-
525:
add dcbz pseudocode
[CONFIRMED; assigned to lkcl]
-
636:
exceptions, predication and zeroing masks need to be added to Function Unit context
[CONFIRMED; assigned to lkcl]
-
450:
Create MMU from microwatt mmu.vhdl
[RESOLVED FIXED; assigned to lkcl]
-
469:
Create D-cache from microwatt dcache.vhdl
[RESOLVED FIXED; assigned to lkcl]
-
485:
Create I-Cache from microwatt icache.vhdl
[RESOLVED FIXED; assigned to lkcl]
-
756:
LDST PortInterface is not using MSR.DR for virtual mode
[RESOLVED FIXED; assigned to lkcl]
-
525:
add dcbz pseudocode
[CONFIRMED; assigned to lkcl]
-
491:
MMU Function Unit needed
[RESOLVED FIXED; assigned to lkcl]
-
52:
software simulator compliant with the latest SimpleV Vectorisation Standard (SVP64)
[CONFIRMED; assigned to lkcl]
-
170:
high-to-low register-to-register copy needed
[CONFIRMED; assigned to lkcl]
-
104:
add subvl support from latest sv 0.6 draft spec
[RESOLVED INVALID; assigned to lkcl]
-
105:
sv 0.6 draft support for fail-on-first condition (and trap)
[RESOLVED INVALID; assigned to lkcl]
-
232:
Implementation of video opcodes in simulator
[RESOLVED FIXED; assigned to cand]
-
170:
high-to-low register-to-register copy needed
[CONFIRMED; assigned to lkcl]
-
53:
design and software simulation of some of the 3D custom instructions needed for the GPU
[CONFIRMED; assigned to lkcl]
-
142:
Vector Ops needed (DOT, Cross, Dist, normalise, CORDIC, S/LERP etc)
[CONFIRMED; assigned to lkcl]
-
494:
"perf counters" needed
[CONFIRMED; assigned to lkcl]
-
541:
implement nmigen HDL IEEE754 and Khronos FP transcendentals needed for 3D (CORDIC ones)
[CONFIRMED; assigned to lkcl]
-
127:
Transcendentals needed (SIN/COS/ATAN2/EXP/LOG/POW etc.)
[RESOLVED FIXED; assigned to lkcl]
-
208:
implement CORDIC in a general way sufficient to do transcendentals
[RESOLVED FIXED; assigned to lkcl]
(*)
-
142:
Vector Ops needed (DOT, Cross, Dist, normalise, CORDIC, S/LERP etc)
[CONFIRMED; assigned to lkcl]
-
54:
Kazan Vulkan driver operational
[CONFIRMED; assigned to programmerjake]
-
161:
Create Shader Compiler IR and SPIR-V to IR translator
[IN_PROGRESS; assigned to programmerjake]
-
260:
Figure out creating userspace-driven explicit synchronization for Linux Kernel sync_file and dma_fence
[CONFIRMED; assigned to lkcl]
-
386:
Evaluate Lavapipe (nee Vallium) instead of Kazan or new Mesa driver
[CONFIRMED; assigned to lkcl]
-
405:
Write PowerPC64 backend for Cranelift
[CONFIRMED; assigned to programmerjake]
-
632:
Create Vector Math library shared with Rust's project portable SIMD (`std::simd`)
[IN_PROGRESS; assigned to programmerjake]
-
83:
Implementing the SPIR-V structure parser
[PAYMENTPENDING FIXED; assigned to programmerjake]
-
451:
Add PowerPC64 to Rust's new inline assembly implementation
[RESOLVED FIXED; assigned to programmerjake]
-
161:
Create Shader Compiler IR and SPIR-V to IR translator
[IN_PROGRESS; assigned to programmerjake]
-
70:
evaluate Bus Architectures
[DEFERRED; assigned to lkcl]
-
48:
Complete IEEE754 floating point pipeline
[RESOLVED FIXED; assigned to lkcl]
-
102:
IEEE754 pipeline "early out" needed
[CONFIRMED; assigned to lkcl]
-
114:
reservation station "feedback" for further processing (FP64)
[CONFIRMED; assigned to lkcl]
-
115:
SIMD ALUs needed
[CONFIRMED; assigned to lkcl]
-
1024:
Second phase of nmigen Dynamic Partitioned SIMD and nmigen language improvements
[CONFIRMED; assigned to lkcl]
-
101:
IEEE754 pipeline "go_die" (Computation Unit Cancellation) needed
[RESOLVED FIXED; assigned to lkcl]
-
132:
SIMD-like nmigen signal for partitioning
[RESOLVED FIXED; assigned to lkcl]
-
168:
create naturally aligned partition points
[CONFIRMED; assigned to lkcl]
-
176:
partitioned dynamic bool/all/any/xor operators
[CONFIRMED; assigned to lkcl]
-
467:
PartitionedSignal needs to work with Arrays
[CONFIRMED; assigned to lkcl]
-
575:
PartitionedEqGtLe needs to use RippleLSB
[CONFIRMED; assigned to lkcl]
-
708:
PartitionedSignal API design
[CONFIRMED; assigned to programmerjake]
-
718:
PartitionedSignal __r*__ functions need review
[CONFIRMED; assigned to lkcl]
-
719:
PartitionedSignal signed and unsigned
[CONFIRMED; assigned to lkcl]
-
720:
PartitionedSignal cast needed
[CONFIRMED; assigned to lkcl]
-
734:
add Partitioned SimdSignal support for elwidth-based layouts (currently ElwidPartType)
[CONFIRMED; assigned to lkcl]
-
735:
DynamicPartitionedShift has hdl parameter that is not needed
[CONFIRMED; assigned to lkcl]
-
167:
a partitioned mux is needed
[RESOLVED FIXED; assigned to lkcl]
-
171:
partitioned comparison operators
[PAYMENTPENDING FIXED; assigned to lkcl]
-
172:
partitioned signal add/sub/neg
[PAYMENTPENDING FIXED; assigned to lkcl]
-
173:
dynamic partitioned "shift"
[PAYMENTPENDING FIXED; assigned to lkcl]
-
458:
PartitionedSignal needs nmigen constructs "m.If", Switch etc
[RESOLVED FIXED; assigned to programmerjake]
-
565:
Improve formal verification on PartitionedSignal
[RESOLVED FIXED; assigned to cestrauss]
-
707:
PartitionedSignal limited Cat function needed
[RESOLVED FIXED; assigned to lkcl]
-
709:
PartitionedSignal eq needs to be more sophisticated
[RESOLVED FIXED; assigned to lkcl]
-
168:
create naturally aligned partition points
[CONFIRMED; assigned to lkcl]
-
1024:
Second phase of nmigen Dynamic Partitioned SIMD and nmigen language improvements
[CONFIRMED; assigned to lkcl]
-
116:
Integer ADD/MUL/DIV operations needed (using FP bypass). SIMD as well
[CONFIRMED; assigned to lkcl]
-
102:
IEEE754 pipeline "early out" needed
[CONFIRMED; assigned to lkcl]
(*)
-
114:
reservation station "feedback" for further processing (FP64)
[CONFIRMED; assigned to lkcl]
(*)
-
115:
SIMD ALUs needed
[CONFIRMED; assigned to lkcl]
(*)
-
124:
add dynamically removable/insertable pipeline registers to div pipe to allow high clock speeds
[CONFIRMED; assigned to lkcl]
-
101:
IEEE754 pipeline "go_die" (Computation Unit Cancellation) needed
[RESOLVED FIXED; assigned to lkcl]
(*)
-
102:
IEEE754 pipeline "early out" needed
[CONFIRMED; assigned to lkcl]
-
118:
FP Flags are needed
[CONFIRMED; assigned to lkcl]
-
119:
Zero and sign extension blocks are needed, FP.and INT
[CONFIRMED; assigned to lkcl]
-
121:
refactor FP exponent naming
[CONFIRMED; assigned to lkcl]
-
126:
Make Div core conditional (enable signal)
[CONFIRMED; assigned to lkcl]
-
136:
partitioned multiplier needs to be adapted to Dadda algorithm
[CONFIRMED; assigned to lkcl]
-
512:
use m.submodules["...%d"] = mod instead of setattr
[CONFIRMED; assigned to lkcl]
-
43:
create an IEEE754 FP "sqrt"
[PAYMENTPENDING FIXED; assigned to alexandar.kostovic]
-
44:
IEEE754 FPU inverse (reciprocal) sqrt
[PAYMENTPENDING FIXED; assigned to programmerjake]
-
74:
preliminary exploratory software emulation of FP SQRT
[RESOLVED FIXED; assigned to alexandar.kostovic]
-
75:
create an IEEE754 FP "add" pipeline
[PAYMENTPENDING FIXED; assigned to lkcl]
-
76:
IEEE754 RISC-V "tininess" as well as rounding modes (odd/even) needed
[RESOLVED INVALID; assigned to lkcl]
-
77:
IEEE754 FP "mul" needed
[PAYMENTPENDING FIXED; assigned to lkcl]
-
78:
IEEE754 FP "div" needed
[PAYMENTPENDING FIXED; assigned to lkcl]
-
99:
IEEE754 *pipelined* FPDIV unit needed
[PAYMENTPENDING FIXED; assigned to programmerjake]
-
101:
IEEE754 pipeline "go_die" (Computation Unit Cancellation) needed
[RESOLVED FIXED; assigned to lkcl]
(*)
-
107:
IEEE754 FPU FCVT "downconversion" needed
[PAYMENTPENDING FIXED; assigned to lkcl]
-
108:
IEEE754 FPU FCVT "upconversion" needed
[PAYMENTPENDING FIXED; assigned to lkcl]
-
111:
FCVT unsigned/signed char/short/int/long (8/16/32/64) to FP16/32/64 needed
[PAYMENTPENDING FIXED; assigned to lkcl]
-
112:
FCVT FP16/32/64 to unsigned/signed char/short/int/long (8/16/32/64) needed
[PAYMENTPENDING FIXED; assigned to lkcl]
-
113:
FCVT unit tests have too great a dynamic range
[RESOLVED FIXED; assigned to lkcl]
-
117:
RISCV FCLASS instruction needed
[PAYMENTPENDING FIXED; assigned to lkcl]
-
120:
implement RISC-V FSGNJ instruction
[PAYMENTPENDING FIXED; assigned to mtnolan2640]
-
122:
FP software emulation needed,
[RESOLVED FIXED; assigned to lkcl]
-
123:
IEEE754 FPU FMAC needed
[RESOLVED DUPLICATE; assigned to lkcl]
-
125:
need NaN unboxing operation
[RESOLVED INVALID; assigned to lkcl]
-
127:
Transcendentals needed (SIN/COS/ATAN2/EXP/LOG/POW etc.)
[RESOLVED FIXED; assigned to lkcl]
(*)
-
129:
FP comparisons needed
[PAYMENTPENDING FIXED; assigned to mtnolan2640]
-
130:
FMIN/MAX needed
[PAYMENTPENDING FIXED; assigned to mtnolan2640]
-
132:
SIMD-like nmigen signal for partitioning
[RESOLVED FIXED; assigned to lkcl]
(*)
-
102:
IEEE754 pipeline "early out" needed
[CONFIRMED; assigned to lkcl]
-
49:
basic processor core (I/O and boot processor)
[RESOLVED INVALID; assigned to lkcl]
-
50:
nmigen pinmux
[RESOLVED FIXED; assigned to lkcl]
(*)
-
22:
FPGA proof-of-concept test needed
[CONFIRMED; assigned to lkcl]
Bug 191 blocks one bug:
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