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Bug 195 depends on 9 bugs:

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•    195: Formal correctness framework is needed for Power ISA [RESOLVED FIXED; assigned to lkcl]
  •    211: formal proof of PowerDecoder stage2 needed [CONFIRMED; assigned to lkcl]
  •    306: Formal Correctness Proof for ALU pipeline [RESOLVED FIXED; assigned to kc5tja]
    •    429: pipeline main_stage formal verification does not check ctx fields fully [CONFIRMED; assigned to kc5tja]
    •    337: Convention for register outputs in *OutputData structures is to use "Data" [RESOLVED FIXED; assigned to lkcl]
  •    331: Formal Correctness Proof for LOGICAL pipeline [RESOLVED FIXED; assigned to lkcl]
  •    332: Formal correctness proof needed for CR pipeline [RESOLVED FIXED; assigned to mtnolan2640]
  •    418: SPR pipeline formal correctness proof needed [RESOLVED FIXED; assigned to kc5tja]
    •    429: pipeline main_stage formal verification does not check ctx fields fully [CONFIRMED; assigned to kc5tja] (*)
  •    419: MUL pipeline formal proof needed [RESOLVED FIXED; assigned to kc5tja]
    •    482: mul ok and ov must not be unconditionally set [RESOLVED FIXED; assigned to lkcl]

Bug 195 blocks 4 bugs:

view as bug list

•    195: Formal correctness framework is needed for Power ISA [RESOLVED FIXED; assigned to lkcl]
  •    158: NLNet 2019 Formal Correctness Proofs toplevel 2019-10-032 [RESOLVED FIXED; assigned to 2019-10P]
    •    80: Formal Mathematical Proofs needed [CONFIRMED; assigned to lkcl]
      •    487: Canonical Root bug for budgeting purposes for the "Future" milestone [DEFERRED; assigned to lkcl]
    •    938: All NLnet and NGI Grant Milestones [CONFIRMED; assigned to lkcl]

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