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Bug 507 depends on one bug:

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•    507: ls180 asic needs an ioring, pads need defining and connecting [RESOLVED FIXED; assigned to Jean-Paul.Chaput]
  •    506: 8x VDD VSS pins needed in ioring [RESOLVED FIXED; assigned to Jean-Paul.Chaput]

Bug 507 blocks 4 bugs:

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•    507: ls180 asic needs an ioring, pads need defining and connecting [RESOLVED FIXED; assigned to Jean-Paul.Chaput]
  •    199: Layout using coriolis2 main core, 180nm [RESOLVED FIXED; assigned to Jean-Paul.Chaput]
    •    138: NLNet 2019 Coriolis2 Layout proposal 2019-10-029 [RESOLVED FIXED; assigned to lkcl]
      •    938: All NLnet and NGI Grant Milestones [CONFIRMED; assigned to lkcl]
    •    204: Transition from symbolic to real Cell Library for 180nm layout [RESOLVED FIXED; assigned to staf]
      •    138: NLNet 2019 Coriolis2 Layout proposal 2019-10-029 [RESOLVED FIXED; assigned to lkcl] (*)

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