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Bug 676 depends on 7 bugs:

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•    676: FORTRAN MAXLOC SVP64 example [RESOLVED FIXED; assigned to lkcl]
  •    1183: add /mrr mode (reverse mode) to Data-Dependent Fail-First CR_ops and "single looping" to DDFFirst in general [IN_PROGRESS; assigned to shriya.sharma]
    •    1185: missing pseudocode in ls010 (and probably the whole wiki) for SNZ in data-dependent fail-first for cr-ops [CONFIRMED; assigned to programmerjake]
  •    1236: allow (modify) svstep to be able to *set* the individual parts of SVSTATE it queries [CONFIRMED; assigned to lkcl]
  •    1246: Rc=1 vector output of CRs is going solely into CR0 [CONFIRMED; assigned to lkcl]
  •    1248: sv.creqv (and others) do not encode/decode vector reg numbers correctly [CONFIRMED; assigned to lkcl]
  •    1034: implement crternlogi crbinlog and binlog in ISACaller [RESOLVED FIXED; assigned to ghostmansd]
  •    1249: insndb twin-predication, one predicate (sm or dm) is allowed [RESOLVED INVALID; assigned to lkcl]

Bug 676 blocks 3 bugs:

view as bug list

•    676: FORTRAN MAXLOC SVP64 example [RESOLVED FIXED; assigned to lkcl]
  •    952: NLnet 2022 OPF ISA WG Milestone 2022-08-051 [CONFIRMED; assigned to lkcl]
    •    938: All NLnet and NGI Grant Milestones [CONFIRMED; assigned to lkcl]
  •    953: SVP64 assembly cookbook [CONFIRMED; assigned to lkcl]
    •    952: NLnet 2022 OPF ISA WG Milestone 2022-08-051 [CONFIRMED; assigned to lkcl] (*)

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