Max Depth:

Bug 938 depends on 579 bugs:

view as bug list

•    938: All NLnet and NGI Grant Milestones [CONFIRMED; assigned to lkcl]
  •    939: NLnet 2021 cavatools proposal 2021-08-071 [CONFIRMED; assigned to lkcl]
    •    1170: come up with plan for nlnet how we want to reassign tasks for cavatools and gigabit-router [CONFIRMED; assigned to andy.miroshnikov]
    •    947: switch reference assembler to machine-readable specs [RESOLVED FIXED; assigned to ghostmansd]
    •    958: provide support for missing instructions in binutils [RESOLVED FIXED; assigned to ghostmansd]
    •    1240: add Jacob to list of payment recipients for 2021-08-071 so he can submit RFPs [RESOLVED FIXED; assigned to 2022-08-071]
  •    952: NLnet 2022 OPF ISA WG Milestone 2022-08-051 [CONFIRMED; assigned to lkcl]
    •    659: SVP64 demo / unit test of CRM data-dependent ffirst mode implementing insertion sort [CONFIRMED; assigned to lkcl]
    •    684: XLEN-16 fails when XLEN=8 [CONFIRMED; assigned to ghostmansd]
    •    697: SVP64 Reduce Modes [CONFIRMED; assigned to lkcl]
    •    789: svp64 predicate bits and DCT/FFT remap and matrix remap [CONFIRMED; assigned to lkcl]
    •    897: de-spacer demo algorithm [CONFIRMED; assigned to lkcl]
    •    905: create Scalar reg access encoding (SVP64-Single) [CONFIRMED; assigned to lkcl]
    •    914: setvl should not set SO [CONFIRMED; assigned to lkcl]
    •    924: potential major opcode allocation for SVP64 [IN_PROGRESS; assigned to lkcl]
    •    928: ld/st with shift [CONFIRMED; assigned to lkcl]
    •    936: change the spec so RC1=1 fail-first instructions always write all outputs up to and including failing subvector [IN_PROGRESS; assigned to lkcl]
    •    953: SVP64 assembly cookbook [CONFIRMED; assigned to lkcl]
      •    659: SVP64 demo / unit test of CRM data-dependent ffirst mode implementing insertion sort [CONFIRMED; assigned to lkcl] (*)
      •    897: de-spacer demo algorithm [CONFIRMED; assigned to lkcl] (*)
      •    1050: SVP64 bitonic sort (actually, using DCT inner butterfly?) [CONFIRMED; assigned to lkcl]
      •    1078: svp64 counting sort demo [CONFIRMED; assigned to lkcl]
      •    1085: parallel prefix sum polynomial interpolation [CONFIRMED; assigned to lkcl]
      •    672: create SVP64 demo / unit test "positional popcount" [RESOLVED FIXED; assigned to shriya.sharma]
        •    1221: weird ISAcaller bug, _RA not present [IN_PROGRESS; assigned to programmerjake]
        •    1222: setvl Rc=1 needs to be more sophisticated [CONFIRMED; assigned to lkcl]
        •    1225: ISACaller __decode_prefix is damaging the output by setting is_svp64_mode to True on a scalar add [RESOLVED WORKSFORME; assigned to programmerjake]
      •    676: FORTRAN MAXLOC SVP64 example [RESOLVED FIXED; assigned to lkcl]
        •    1183: add /mrr mode (reverse mode) to Data-Dependent Fail-First CR_ops and "single looping" to DDFFirst in general [IN_PROGRESS; assigned to shriya.sharma]
          •    1185: missing pseudocode in ls010 (and probably the whole wiki) for SNZ in data-dependent fail-first for cr-ops [CONFIRMED; assigned to programmerjake]
        •    1236: allow (modify) svstep to be able to *set* the individual parts of SVSTATE it queries [CONFIRMED; assigned to lkcl]
        •    1246: Rc=1 vector output of CRs is going solely into CR0 [CONFIRMED; assigned to lkcl]
        •    1248: sv.creqv (and others) do not encode/decode vector reg numbers correctly [CONFIRMED; assigned to lkcl]
        •    1034: implement crternlogi crbinlog and binlog in ISACaller [RESOLVED FIXED; assigned to ghostmansd]
        •    1249: insndb twin-predication, one predicate (sm or dm) is allowed [RESOLVED INVALID; assigned to lkcl]
      •    701: document Matrix REMAP in SVP64 [RESOLVED FIXED; assigned to andy.miroshnikov]
    •    960: Final Report on OPF ISA External RFC ls003 - maddedu, maddedus, divmod2du, dsld, dsrd [IN_PROGRESS; assigned to lkcl]
      •    1010: 1st Draft OPF ISA WG External RFC ls003: "bigint" operations [RESOLVED FIXED; assigned to lkcl]
    •    963: 2D DCT/FFT REMAP [CONFIRMED; assigned to lkcl]
    •    969: 64-bit variants of setvl, svshape, svstep and svindex [CONFIRMED; assigned to lkcl]
    •    970: boyer-moore string-search algorithm in SVP64 [CONFIRMED; assigned to lkcl]
    •    973: an easy way to shift registers up and down is needed [CONFIRMED; assigned to lkcl]
    •    986: SVP64 LD/ST format simplification [CONFIRMED; assigned to lkcl]
    •    992: XLEN prtyw bug [CONFIRMED; assigned to lkcl]
    •    995: align SVP64 instructions [CONFIRMED; assigned to ghostmansd]
    •    1021: OPF ISA Schedule A preparation planning and creation of tasks [IN_PROGRESS; assigned to lkcl]
    •    1061: change extsb/h/w definitions to scale input size with XLEN rather than convert from fixed sizes [IN_PROGRESS; assigned to programmerjake]
    •    1081: pay special attention to stfiwx UNDEFINED behaviour [CONFIRMED; assigned to lkcl]
    •    1176: implement CR-Based (not CR *FIELD* based) SVP64 in ISACaller (sv.mcrxr, sv.mtcr etc) [CONFIRMED; assigned to lkcl]
      •    1175: implement mcrxrx in ISACaller [RESOLVED FIXED; assigned to programmerjake]
    •    229: AV1 optimizations [RESOLVED FIXED; assigned to konstantinos]
    •    672: create SVP64 demo / unit test "positional popcount" [RESOLVED FIXED; assigned to shriya.sharma] (*)
    •    676: FORTRAN MAXLOC SVP64 example [RESOLVED FIXED; assigned to lkcl] (*)
    •    701: document Matrix REMAP in SVP64 [RESOLVED FIXED; assigned to andy.miroshnikov] (*)
    •    910: mins/maxs with (RB|0) or (RA|0) option? [RESOLVED FIXED; assigned to programmerjake]
    •    915: add overflow to av maxu and maxs operations [RESOLVED FIXED; assigned to lkcl]
    •    944: OPF ISA External RFC ls002 - fmvis and fishmv [RESOLVED FIXED; assigned to lkcl]
    •    962: design integer-versions of fft/dct "butterfly" instructions [RESOLVED DUPLICATE; assigned to lkcl]
    •    972: addme/subfme carry/overflow is incorrect [RESOLVED FIXED; assigned to programmerjake]
    •    1077: evaluate removing /vec234 from instructions, move subvl to SVSTATE [RESOLVED WONTFIX; assigned to lkcl]
    •    1093: Fix "GPR-or-zero" in binutils and openpower-isa [RESOLVED FIXED; assigned to ghostmansd]
      •    1020: binutils updates from OPF RFC feedback [CONFIRMED; assigned to ghostmansd]
        •    1115: rldimi "mb" offset by 1 bit [CONFIRMED; assigned to ghostmansd]
      •    1098: Fix instructions which have extra conflicts [RESOLVED FIXED; assigned to lkcl]
  •    961: NLnet 2022 Libre-SOC "ongoing" milestone 2022-08-107 (approved, MoU signed, waiting countersignature) [CONFIRMED; assigned to lkcl]
    •    737: in-order single-issue Power ISA 3.0 core [CONFIRMED; assigned to cestrauss]
      •    726: Additional core_stop check after Execute breaks single-stepping [CONFIRMED; assigned to cestrauss]
      •    747: verify that instructions that write to the same register twice are correctly decoded as illegal/trap [CONFIRMED; assigned to lkcl]
      •    749: in-order core needs to be out-of-order (6600) [CONFIRMED; assigned to lkcl]
      •    1094: insndb instruction database visitor-walker is needed [RESOLVED FIXED; assigned to ghostmansd]
    •    990: gram needs changes to work on the orangecrab [CONFIRMED; assigned to libre-soc]
    •    995: align SVP64 instructions [CONFIRMED; assigned to ghostmansd] (*)
    •    1003: instruction database continuation and binutils, SVP64 [CONFIRMED; assigned to ghostmansd]
      •    995: align SVP64 instructions [CONFIRMED; assigned to ghostmansd] (*)
      •    1083: update to DD FFirst Mode binutils PowerDecoder [CONFIRMED; assigned to ghostmansd]
      •    1094: insndb instruction database visitor-walker is needed [RESOLVED FIXED; assigned to ghostmansd] (*)
    •    1081: pay special attention to stfiwx UNDEFINED behaviour [CONFIRMED; assigned to lkcl] (*)
    •    1086: ls2 verilator sim - setting up chroot and documentation [CONFIRMED; assigned to andy.miroshnikov]
      •    1073: Microwatt verilator sim - setting up chroot and documentation [RESOLVED FIXED; assigned to andy.miroshnikov]
    •    1127: Generating a Libre-SOC Microwatt-compatible core with SVP64 [CONFIRMED; assigned to andy.miroshnikov]
      •    1086: ls2 verilator sim - setting up chroot and documentation [CONFIRMED; assigned to andy.miroshnikov] (*)
    •    1176: implement CR-Based (not CR *FIELD* based) SVP64 in ISACaller (sv.mcrxr, sv.mtcr etc) [CONFIRMED; assigned to lkcl] (*)
    •    383: Complete first functional POWER9 Core [RESOLVED FIXED; assigned to lkcl]
      •    11: Wishbone Interface / Bridge [CONFIRMED; assigned to lkcl]
        •    468: wishbone downconverter needed [RESOLVED FIXED; assigned to lkcl]
      •    22: FPGA proof-of-concept test needed [CONFIRMED; assigned to lkcl]
        •    2: Define and find hard macros for all Shakti M-Class Interfaces [CONFIRMED; assigned to lkcl]
          •    1: I2C Interface [CONFIRMED; assigned to lkcl]
          •    3: I2S interface [CONFIRMED; assigned to lkcl]
            •    19: tester / testing needed for audio MPAC [CONFIRMED; assigned to lkcl]
          •    4: FlexBus Interface [CONFIRMED; assigned to lkcl]
          •    5: RGB/TTL Interface [CONFIRMED; assigned to lkcl]
            •    29: rgbttl convert to AXI4 [CONFIRMED; assigned to lkcl]
          •    6: SPI interface needed [CONFIRMED; assigned to lkcl]
          •    7: SD/MMC and eMMC interface needed [CONFIRMED; assigned to lkcl]
          •    8: Pinmux needed [CONFIRMED; assigned to lkcl]
            •    24: pinmux memory map [IN_PROGRESS; assigned to lkcl]
            •    25: pinmux generate c header files [CONFIRMED; assigned to lkcl]
            •    26: pinmux default mux values [IN_PROGRESS; assigned to lkcl]
            •    27: pinmux synchroniser clocks [CONFIRMED; assigned to lkcl]
            •    30: ULPI / UTMI needed into pinmux for code-generation [CONFIRMED; assigned to lkcl]
            •    31: need diff pair pin on pinmux [CONFIRMED; assigned to lkcl]
            •    33: pinmux verification of rules etc. [CONFIRMED; assigned to lkcl]
            •    34: pinmux add sdram interface [IN_PROGRESS; assigned to lkcl]
            •    35: pinmux add vme peripheral [CONFIRMED; assigned to lkcl]
            •    20: pinmux needs to auto-generate bsv Makefile [RESOLVED FIXED; assigned to lkcl]
            •    28: pinmux dedicated peripherals code-gen needed [RESOLVED FIXED; assigned to lkcl]
            •    50: nmigen pinmux [RESOLVED FIXED; assigned to lkcl]
              •    846: Pinmux Pinspec Interconnect Auto-Generation [CONFIRMED; assigned to andy.miroshnikov]
                •    762: Peripheral Pin Muxing Development [RESOLVED FIXED; assigned to andy.miroshnikov]
              •    746: I2C needs an Open Drain IO Pad [RESOLVED FIXED; assigned to staf]
              •    750: Convert pinmux gpio, jtag-block bitmap diagrams to svg vector [RESOLVED FIXED; assigned to veerakumar.r]
              •    762: Peripheral Pin Muxing Development [RESOLVED FIXED; assigned to andy.miroshnikov] (*)
              •    763: Work on I/O Core Pad JTAG Tests [RESOLVED FIXED; assigned to lkcl]
              •    764: Documentation of I/O Core/Pad JTAG Tests [RESOLVED FIXED; assigned to andy.miroshnikov]
          •    9: RGMII (Gigabit Ethernet) Interface [CONFIRMED; assigned to lkcl]
          •    10: AXI Bridge Interface [CONFIRMED; assigned to lkcl]
          •    11: Wishbone Interface / Bridge [CONFIRMED; assigned to lkcl] (*)
          •    12: AC97 Audio Interface [CONFIRMED; assigned to lkcl]
            •    19: tester / testing needed for audio MPAC [CONFIRMED; assigned to lkcl] (*)
          •    13: PWM Interface needed [CONFIRMED; assigned to lkcl]
          •    14: EINT interface needed (PLIC) [CONFIRMED; assigned to lkcl]
          •    15: GPIO interface needed [CONFIRMED; assigned to lkcl]
          •    17: IOMMU needed [CONFIRMED; assigned to lkcl]
          •    18: PDM audio needed [CONFIRMED; assigned to lkcl]
            •    19: tester / testing needed for audio MPAC [CONFIRMED; assigned to lkcl] (*)
          •    21: LPDDR3/LPDDR4 needed [CONFIRMED; assigned to lkcl]
        •    206: Implement branch prediction [CONFIRMED; assigned to lkcl]
        •    81: implement 6600-style "precise" out-of-order scoreboard [RESOLVED FIXED; assigned to lkcl]
          •    87: investigate scoreboard global write pending change [CONFIRMED; assigned to lkcl]
          •    88: investigate multi-issue (superscalar) [CONFIRMED; assigned to lkcl]
          •    92: Implement in order instruction retire refcounting [CONFIRMED; assigned to lkcl]
          •    338: CompUnitALU needs go_die to be wired to ALU shadow mask [CONFIRMED; assigned to lkcl]
          •    86: 6600-style preliminary investigation [PAYMENTPENDING FIXED; assigned to lkcl]
          •    94: implement load/store memory dependency matrix [RESOLVED FIXED; assigned to lkcl]
          •    95: implement shadowing for use in precise exceptions, branch speculation, predication and WaW ordering [PAYMENTPENDING FIXED; assigned to lkcl]
        •    186: Create decoder for SOC: Power ISA [RESOLVED FIXED; assigned to lkcl]
          •    211: formal proof of PowerDecoder stage2 needed [CONFIRMED; assigned to lkcl]
          •    189: Create partitioned right shift using the existing partitioned left shift [PAYMENTPENDING FIXED; assigned to mtnolan2640]
          •    261: power_enums.py to read SPRs from sprs.csv [RESOLVED FIXED; assigned to lkcl]
          •    271: SigDecode in power_fields has extra spurious fields [RESOLVED FIXED; assigned to mtnolan2640]
        •    412: set up litex for peripherals and linking to core [PAYMENTPENDING FIXED; assigned to lkcl]
          •    414: debug port needed (JTAG, other frontend) [PAYMENTPENDING FIXED; assigned to lkcl]
            •    447: document DMI registers and format for use in microwatt and libre-soc [CONFIRMED; assigned to lkcl]
            •    493: DMI JTAG TAP needed [RESOLVED FIXED; assigned to colepoirier]
      •    155: a PLL is needed for the SoC [CONFIRMED; assigned to dimitri.galayko]
      •    216: LOAD STORE buffer needed [CONFIRMED; assigned to lkcl]
        •    257: Implement demo Load/Store queueing algorithm [DEFERRED; assigned to programmerjake]
        •    465: add LoadStore error and exception handling via PortInterface [CONFIRMED; assigned to lkcl]
      •    304: Define minimum viable interface set for 180nm ASIC [CONFIRMED; assigned to lkcl]
      •    318: fix LDSTCompUnit [CONFIRMED; assigned to cestrauss]
      •    321: BUG: Running ltp on a pipeline gives warnings about loops [CONFIRMED; assigned to lkcl]
      •    336: ALU CompUnit needs to recognise that RA (src1) can be zero [CONFIRMED; assigned to cestrauss]
        •    334: POWER decode A=zero needs to be set as a flag in Execute1Type [RESOLVED FIXED; assigned to lkcl]
      •    350: LDSTCompUnit also needs to support zeroing on RA [CONFIRMED; assigned to cestrauss]
      •    352: virtual (dependency-tracked) regfile (cache) needed [CONFIRMED; assigned to lkcl]
      •    356: fu POWER9 pipeline unit tests need to test RA=0 [CONFIRMED; assigned to lkcl]
      •    359: cut down on wires between decode and function units [CONFIRMED; assigned to lkcl]
      •    361: all test_pipe_caller.py needs RA=0 tests [CONFIRMED; assigned to lkcl]
      •    390: ISACaller get_assembly_name() not identifying mtocrf / mtcrf correctly [CONFIRMED; assigned to lkcl]
      •    396: create simulator PowerISA div/mod functions [IN_PROGRESS; assigned to programmerjake]
      •    397: design and discuss user-tag flags in wishbone to provide phase 1 / 2 "speculative" memory accesses [CONFIRMED; assigned to lkcl]
      •    410: Design Bus Protocol suitable for speculative execution [CONFIRMED; assigned to lkcl]
      •    415: miscellaneous POWER9 instructions needed: OP_NOP, ATTN, ILLEGAL and unit tests [CONFIRMED; assigned to lkcl]
      •    423: st*cx. needs to be able to update CR0 [CONFIRMED; assigned to lkcl]
      •    424: need to respect 32/64 bit mode [CONFIRMED; assigned to lkcl]
      •    427: LDST cache-inhibit instructions needed (l*cix, st*cix) [CONFIRMED; assigned to lkcl]
      •    428: create separate MSR regfile [CONFIRMED; assigned to lkcl]
      •    432: mulld pseudocode overflow calculation incorrect [IN_PROGRESS; assigned to lkcl]
      •    434: remove mask_wid from TestMemPspec [CONFIRMED; assigned to lkcl]
      •    447: document DMI registers and format for use in microwatt and libre-soc [CONFIRMED; assigned to lkcl] (*)
      •    448: MUL pipeline unit tests [IN_PROGRESS; assigned to lkcl]
      •    462: add integer POWER9 MAC operation [CONFIRMED; assigned to lkcl]
      •    465: add LoadStore error and exception handling via PortInterface [CONFIRMED; assigned to lkcl] (*)
      •    470: convert code using LoadStoreInterface to PortInterface [CONFIRMED; assigned to lkcl]
      •    479: need to check mulhwo. on IBM POWER9 hardware [CONFIRMED; assigned to lkcl]
      •    484: Write VHDL to expose CR and XER from Microwatt so single-stepping is possible [CONFIRMED; assigned to lkcl]
      •    486: Script and document the setup and installation of microwatt dependency on the wiki-HDL_workflow page [CONFIRMED; assigned to lkcl]
      •    489: PowerDecoder2 notes [CONFIRMED; assigned to lkcl]
      •    498: JTAG ECP5 "tap" needed [CONFIRMED; assigned to lkcl]
      •    512: use m.submodules["...%d"] = mod instead of setattr [CONFIRMED; assigned to lkcl]
      •    514: review ls180 reset connections [CONFIRMED; assigned to lkcl]
      •    515: confirm that it is possible to upload into SRAM via JTAG (firmware upload / processor start script) [CONFIRMED; assigned to lkcl]
      •    522: opcode csv file discrepancies [CONFIRMED; assigned to lkcl]
      •    525: add dcbz pseudocode [CONFIRMED; assigned to lkcl]
      •    528: parameter needed in coriolis2 to specify individually which clocks are to have a Clock Tree [CONFIRMED; assigned to Jean-Paul.Chaput]
      •    629: TRAP pipeline unit test failures [CONFIRMED; assigned to lkcl]
      •    186: Create decoder for SOC: Power ISA [RESOLVED FIXED; assigned to lkcl] (*)
      •    302: create a list of exception types for LD/ST operations in POWER [RESOLVED DUPLICATE; assigned to lkcl]
      •    305: Create Pipelined ALU similar to alu_hier.py [RESOLVED FIXED; assigned to mtnolan2640]
        •    319: POWER9 setting carry (and other) XER flags [CONFIRMED; assigned to mtnolan2640]
        •    361: all test_pipe_caller.py needs RA=0 tests [CONFIRMED; assigned to lkcl] (*)
        •    306: Formal Correctness Proof for ALU pipeline [RESOLVED FIXED; assigned to kc5tja]
          •    429: pipeline main_stage formal verification does not check ctx fields fully [CONFIRMED; assigned to kc5tja]
          •    337: Convention for register outputs in *OutputData structures is to use "Data" [RESOLVED FIXED; assigned to lkcl]
        •    334: POWER decode A=zero needs to be set as a flag in Execute1Type [RESOLVED FIXED; assigned to lkcl] (*)
        •    337: Convention for register outputs in *OutputData structures is to use "Data" [RESOLVED FIXED; assigned to lkcl] (*)
        •    358: new MCU-ALU test picked up RC / OE / CR handling issue [RESOLVED FIXED; assigned to mtnolan2640]
        •    360: move RS to 1st or 2nd operand in CSV files [RESOLVED FIXED; assigned to lkcl]
        •    369: missing XER SO/OV/32 check in test_pipe_caller.py [RESOLVED FIXED; assigned to lkcl]
      •    313: Create Branch Pipeline for POWER9 [RESOLVED FIXED; assigned to mtnolan2640]
        •    356: fu POWER9 pipeline unit tests need to test RA=0 [CONFIRMED; assigned to lkcl] (*)
        •    335: Formal Correctness Proof for Branch pipeline [RESOLVED FIXED; assigned to lkcl]
          •    435: PC and MSR need to be in the "state" (Decode2Execute1Type) [RESOLVED FIXED; assigned to lkcl]
      •    314: Create POWER9 Condition Register pipeline [RESOLVED FIXED; assigned to mtnolan2640]
        •    356: fu POWER9 pipeline unit tests need to test RA=0 [CONFIRMED; assigned to lkcl] (*)
        •    332: Formal correctness proof needed for CR pipeline [RESOLVED FIXED; assigned to mtnolan2640]
        •    333: investigate why CR pipeline code took 100% CPU and locked up generating ILANG [RESOLVED FIXED; assigned to lkcl]
        •    360: move RS to 1st or 2nd operand in CSV files [RESOLVED FIXED; assigned to lkcl] (*)
      •    315: SPR Pipeline needed [RESOLVED DUPLICATE; assigned to lkcl]
        •    356: fu POWER9 pipeline unit tests need to test RA=0 [CONFIRMED; assigned to lkcl] (*)
        •    418: SPR pipeline formal correctness proof needed [RESOLVED FIXED; assigned to kc5tja]
          •    429: pipeline main_stage formal verification does not check ctx fields fully [CONFIRMED; assigned to kc5tja] (*)
      •    323: create POWER9 MUL pipeline [RESOLVED FIXED; assigned to programmerjake]
        •    356: fu POWER9 pipeline unit tests need to test RA=0 [CONFIRMED; assigned to lkcl] (*)
        •    432: mulld pseudocode overflow calculation incorrect [IN_PROGRESS; assigned to lkcl] (*)
        •    448: MUL pipeline unit tests [IN_PROGRESS; assigned to lkcl] (*)
        •    419: MUL pipeline formal proof needed [RESOLVED FIXED; assigned to kc5tja]
          •    482: mul ok and ov must not be unconditionally set [RESOLVED FIXED; assigned to lkcl]
      •    324: create POWER DIV pipeline [RESOLVED FIXED; assigned to programmerjake]
        •    356: fu POWER9 pipeline unit tests need to test RA=0 [CONFIRMED; assigned to lkcl] (*)
        •    396: create simulator PowerISA div/mod functions [IN_PROGRESS; assigned to programmerjake] (*)
        •    413: DIV "trial" blocks are too large [CONFIRMED; assigned to lkcl]
        •    420: DIV pipeline formal correctness proof needed [CONFIRMED; assigned to lkcl]
        •    425: DIV overflow not being calculated correctly [CONFIRMED; assigned to programmerjake]
        •    437: div test cases coordinated across different software/hdl [CONFIRMED; assigned to lkcl]
        •    438: add caching/memoization to soc.simulator.program.Program [CONFIRMED; assigned to programmerjake]
        •    439: generated op_divde appears to be incorrect [CONFIRMED; assigned to programmerjake]
        •    433: building pia (power instruction analyser) needs to be documented [RESOLVED FIXED; assigned to programmerjake]
        •    449: FU unit tests checking output one cycle too late [RESOLVED FIXED; assigned to lkcl]
        •    471: bug in modsd DIV FSM [RESOLVED FIXED; assigned to programmerjake]
      •    325: create POWER9 TRAP pipeline [RESOLVED FIXED; assigned to kc5tja]
        •    356: fu POWER9 pipeline unit tests need to test RA=0 [CONFIRMED; assigned to lkcl] (*)
        •    421: TRAP pipeline formal correctness proof needed [RESOLVED FIXED; assigned to kc5tja]
        •    436: isa simulator appears to calculate wrong result for test_divwuo_regression_1 [RESOLVED FIXED; assigned to lkcl]
      •    330: create POWER9 Logic Pipeline [RESOLVED FIXED; assigned to mtnolan2640]
        •    356: fu POWER9 pipeline unit tests need to test RA=0 [CONFIRMED; assigned to lkcl] (*)
        •    361: all test_pipe_caller.py needs RA=0 tests [CONFIRMED; assigned to lkcl] (*)
        •    331: Formal Correctness Proof for LOGICAL pipeline [RESOLVED FIXED; assigned to lkcl]
        •    360: move RS to 1st or 2nd operand in CSV files [RESOLVED FIXED; assigned to lkcl] (*)
      •    339: create POWER9 ROTATE (SHIFTROT) pipeline [RESOLVED FIXED; assigned to mtnolan2640]
        •    356: fu POWER9 pipeline unit tests need to test RA=0 [CONFIRMED; assigned to lkcl] (*)
        •    361: all test_pipe_caller.py needs RA=0 tests [CONFIRMED; assigned to lkcl] (*)
        •    340: formal proof of POWER9 SHIFTROT pipeline needed [PAYMENTPENDING FIXED; assigned to programmerjake]
        •    360: move RS to 1st or 2nd operand in CSV files [RESOLVED FIXED; assigned to lkcl] (*)
        •    369: missing XER SO/OV/32 check in test_pipe_caller.py [RESOLVED FIXED; assigned to lkcl] (*)
      •    344: missing mtmsr and mfsprd [RESOLVED FIXED; assigned to lkcl]
      •    345: define POWER9 regfiles [RESOLVED FIXED; assigned to lkcl]
        •    352: virtual (dependency-tracked) regfile (cache) needed [CONFIRMED; assigned to lkcl] (*)
        •    428: create separate MSR regfile [CONFIRMED; assigned to lkcl] (*)
        •    351: create a "block" (mass) regfile port (read and write) onto an array-based regfile [RESOLVED FIXED; assigned to lkcl]
      •    346: simplified test link between compunits and regfile [RESOLVED FIXED; assigned to lkcl]
        •    345: define POWER9 regfiles [RESOLVED FIXED; assigned to lkcl] (*)
      •    348: POWER9 SPR pipeline needed [RESOLVED FIXED; assigned to lkcl]
        •    356: fu POWER9 pipeline unit tests need to test RA=0 [CONFIRMED; assigned to lkcl] (*)
        •    481: SPR pipeline forgot to use full_xer [CONFIRMED; assigned to lkcl]
        •    344: missing mtmsr and mfsprd [RESOLVED FIXED; assigned to lkcl] (*)
        •    418: SPR pipeline formal correctness proof needed [RESOLVED FIXED; assigned to kc5tja] (*)
      •    349: privileged-instruction decoding function needed [RESOLVED FIXED; assigned to lkcl]
      •    351: create a "block" (mass) regfile port (read and write) onto an array-based regfile [RESOLVED FIXED; assigned to lkcl] (*)
      •    382: nmigen wishbone Memory (SRAM) object needed [RESOLVED FIXED; assigned to lkcl]
      •    393: Hook up augmented-Wishbone Memory Bus to LDSTCompUnit (via PortInterface) [RESOLVED FIXED; assigned to lkcl]
        •    403: runtime configureable LoadStoreUnit needed [RESOLVED FIXED; assigned to mtnolan2640]
      •    407: XICS interrupt controller is needed [RESOLVED FIXED; assigned to lkcl]
      •    409: deal with illegal instruction in simulator and hardware [RESOLVED FIXED; assigned to lkcl]
        •    415: miscellaneous POWER9 instructions needed: OP_NOP, ATTN, ILLEGAL and unit tests [CONFIRMED; assigned to lkcl] (*)
        •    325: create POWER9 TRAP pipeline [RESOLVED FIXED; assigned to kc5tja] (*)
      •    412: set up litex for peripherals and linking to core [PAYMENTPENDING FIXED; assigned to lkcl] (*)
      •    414: debug port needed (JTAG, other frontend) [PAYMENTPENDING FIXED; assigned to lkcl] (*)
      •    416: dec and tb POWER9 SPRs needed [RESOLVED FIXED; assigned to lkcl]
      •    418: SPR pipeline formal correctness proof needed [RESOLVED FIXED; assigned to kc5tja] (*)
      •    426: LDST sign-extension support needed [RESOLVED FIXED; assigned to lkcl]
      •    435: PC and MSR need to be in the "state" (Decode2Execute1Type) [RESOLVED FIXED; assigned to lkcl] (*)
      •    441: Avoid unit tests that depend on other unit tests being run first [RESOLVED FIXED; assigned to programmerjake]
      •    454: Create "subset instruction decoders" that are *inside* mul0, *inside* alu0 and so on [RESOLVED DUPLICATE; assigned to lkcl]
      •    463: python based cycle accurate POWER9 simulator [RESOLVED FIXED; assigned to lkcl]
      •    468: wishbone downconverter needed [RESOLVED FIXED; assigned to lkcl] (*)
      •    469: Create D-cache from microwatt dcache.vhdl [RESOLVED FIXED; assigned to lkcl]
        •    450: Create MMU from microwatt mmu.vhdl [RESOLVED FIXED; assigned to lkcl]
          •    525: add dcbz pseudocode [CONFIRMED; assigned to lkcl] (*)
        •    502: determine SRAM block size and implement it [RESOLVED FIXED; assigned to staf]
          •    591: Create yosys external cell wrapper for use by coriolis - DFF-SRAM block and Staf-SRAM blocks [RESOLVED FIXED; assigned to lkcl]
      •    471: bug in modsd DIV FSM [RESOLVED FIXED; assigned to programmerjake] (*)
      •    476: addme ALU pipeline bug [RESOLVED FIXED; assigned to lkcl]
      •    478: MFOCR and MCROF need to be one-hot [RESOLVED FIXED; assigned to lkcl]
      •    482: mul ok and ov must not be unconditionally set [RESOLVED FIXED; assigned to lkcl] (*)
      •    485: Create I-Cache from microwatt icache.vhdl [RESOLVED FIXED; assigned to lkcl]
        •    502: determine SRAM block size and implement it [RESOLVED FIXED; assigned to staf] (*)
      •    490: Complete peripheral set including litex for first functional OpenPOWER Core (ls180) [RESOLVED FIXED; assigned to lkcl]
        •    493: DMI JTAG TAP needed [RESOLVED FIXED; assigned to colepoirier] (*)
        •    508: decide package size and pin allocation for 180nm ASIC [RESOLVED FIXED; assigned to lkcl]
      •    491: MMU Function Unit needed [RESOLVED FIXED; assigned to lkcl]
        •    525: add dcbz pseudocode [CONFIRMED; assigned to lkcl] (*)
        •    636: exceptions, predication and zeroing masks need to be added to Function Unit context [CONFIRMED; assigned to lkcl]
        •    450: Create MMU from microwatt mmu.vhdl [RESOLVED FIXED; assigned to lkcl] (*)
        •    469: Create D-cache from microwatt dcache.vhdl [RESOLVED FIXED; assigned to lkcl] (*)
        •    485: Create I-Cache from microwatt icache.vhdl [RESOLVED FIXED; assigned to lkcl] (*)
        •    756: LDST PortInterface is not using MSR.DR for virtual mode [RESOLVED FIXED; assigned to lkcl]
      •    492: losing Elaboratables in div fsm.py [RESOLVED FIXED; assigned to programmerjake]
      •    493: DMI JTAG TAP needed [RESOLVED FIXED; assigned to colepoirier] (*)
      •    497: use of pia is not being properly maintained and now the unit tests don't work [RESOLVED INVALID; assigned to programmerjake]
      •    502: determine SRAM block size and implement it [RESOLVED FIXED; assigned to staf] (*)
      •    508: decide package size and pin allocation for 180nm ASIC [RESOLVED FIXED; assigned to lkcl] (*)
      •    510: check for combinatorial path through DIV FSM [RESOLVED FIXED; assigned to lkcl]
      •    511: Add a test of IO pins to debug/test/test_jtag_tap.py [RESOLVED FIXED; assigned to colepoirier]
      •    513: nmutil.extend.exts not being used in modsw [RESOLVED FIXED; assigned to programmerjake]
      •    516: rldicl unit test failure [RESOLVED FIXED; assigned to lkcl]
      •    517: Define JTAG pins and set up with litex for ulx3s85f [RESOLVED FIXED; assigned to lkcl]
      •    518: Define JTAG pins and set up with litex for versa_ecp5 [RESOLVED DUPLICATE; assigned to colepoirier]
      •    519: Get output from ulx3s serial port to show up in minicom [RESOLVED FIXED; assigned to colepoirier]
      •    520: Need a way to disable WB interface in core in case it gets stuck active [RESOLVED FIXED; assigned to lkcl]
      •    542: miscategorised opcodes [RESOLVED FIXED; assigned to lkcl]
      •    580: PowerDecoder needs to redirect MMU SPRs to the MMU [RESOLVED FIXED; assigned to libre-soc]
      •    591: Create yosys external cell wrapper for use by coriolis - DFF-SRAM block and Staf-SRAM blocks [RESOLVED FIXED; assigned to lkcl] (*)
      •    605: Extend ECP5_FPGA wiki page with JTAG testing/boot procedure for Libre-SOC test chip [RESOLVED FIXED; assigned to lkcl]
        •    517: Define JTAG pins and set up with litex for ulx3s85f [RESOLVED FIXED; assigned to lkcl] (*)
      •    606: PowerDecoder2 move DecodeCRIn/Out [RESOLVED FIXED; assigned to lkcl]
    •    988: XLEN OPF ISA WG RFC ls005 [RESOLVED FIXED; assigned to lkcl]
      •    1061: change extsb/h/w definitions to scale input size with XLEN rather than convert from fixed sizes [IN_PROGRESS; assigned to programmerjake] (*)
    •    999: SFFS Operating System Porting [RESOLVED FIXED; assigned to sadoon]
    •    1004: FPGA bring up for platform definitions [RESOLVED FIXED; assigned to cestrauss]
    •    1073: Microwatt verilator sim - setting up chroot and documentation [RESOLVED FIXED; assigned to andy.miroshnikov] (*)
    •    1093: Fix "GPR-or-zero" in binutils and openpower-isa [RESOLVED FIXED; assigned to ghostmansd] (*)
    •    1126: How to document new bugs/issues [RESOLVED FIXED; assigned to andy.miroshnikov]
    •    1210: sv.bc branching to incorrect address in Vertical-First mode [RESOLVED FIXED; assigned to programmerjake]
  •    1211: NLnet Simple-V ISA Expansion Project [CONFIRMED; assigned to lkcl]
    •    1214: Simple-V ISA Expansion -- Evaluate adding Simple-V to x86 [CONFIRMED; assigned to lkcl]
    •    1233: Improving LibreSOC Documentation Part-2 [CONFIRMED; assigned to andy.miroshnikov]
      •    1126: How to document new bugs/issues [RESOLVED FIXED; assigned to andy.miroshnikov] (*)
    •    1242: SV REMAP: store REMAP indices in 4 groups of 16 64-bit SPRs (or registers) [CONFIRMED; assigned to lkcl]
    •    1254: libopid needs to be integrated [CONFIRMED; assigned to ghostmansd]
    •    1094: insndb instruction database visitor-walker is needed [RESOLVED FIXED; assigned to ghostmansd] (*)
    •    1171: Improve budget-sync to generate HTML version of task_db/report [RESOLVED FIXED; assigned to 2022-08E]
  •    1212: NLnet 2023 Simple-V RISC-V binutils [CONFIRMED; assigned to lkcl]
    •    905: create Scalar reg access encoding (SVP64-Single) [CONFIRMED; assigned to lkcl] (*)
    •    1094: insndb instruction database visitor-walker is needed [RESOLVED FIXED; assigned to ghostmansd] (*)
    •    1171: Improve budget-sync to generate HTML version of task_db/report [RESOLVED FIXED; assigned to 2022-08E] (*)
  •    1241: NLnet proposal idea for GNU Taler grant [CONFIRMED; assigned to lkcl]
    •    589: NLnet top-level gigabit crypto router 2021-02-052 [RESOLVED FIXED; assigned to lkcl]
      •    773: High-Level Demos of Cryptographic and Other Relevant Algorithms [CONFIRMED; assigned to lkcl]
        •    1151: Ed25519 demo [RESOLVED FIXED; assigned to lkcl]
          •    1155: O(n^2) multiplication REMAP mode(s) [RESOLVED FIXED; assigned to programmerjake]
        •    1153: 2048-bit RSA demo using SVP64 and bigint insns [RESOLVED DUPLICATE; assigned to programmerjake]
      •    776: Documentation of designs, code, processes, and other relevant things as needed [CONFIRMED; assigned to lkcl]
        •    809: modify svp64 to re-enable using OV as a second carry flag for sv.addex [CONFIRMED; assigned to programmerjake]
      •    1170: come up with plan for nlnet how we want to reassign tasks for cavatools and gigabit-router [CONFIRMED; assigned to andy.miroshnikov] (*)
      •    1237: change knuth's algo-D divmod assembly to use new SVP64 features from bug #1183 [CONFIRMED; assigned to programmerjake]
        •    1183: add /mrr mode (reverse mode) to Data-Dependent Fail-First CR_ops and "single looping" to DDFFirst in general [IN_PROGRESS; assigned to shriya.sharma] (*)
        •    1044: SVP64 implementation of pow(x,y,z) [RESOLVED FIXED; assigned to programmerjake]
          •    1183: add /mrr mode (reverse mode) to Data-Dependent Fail-First CR_ops and "single looping" to DDFFirst in general [IN_PROGRESS; assigned to shriya.sharma] (*)
          •    1155: O(n^2) multiplication REMAP mode(s) [RESOLVED FIXED; assigned to programmerjake] (*)
          •    1161: EXTRA2/3 algorithm likely inconsistent with EXTRA2 tables causing PowerDecoder2 and insndb to disagree on scalar EXTRA2 register encoding for >=r32 [RESOLVED FIXED; assigned to programmerjake]
          •    1175: implement mcrxrx in ISACaller [RESOLVED FIXED; assigned to programmerjake] (*)
      •    770: Discussion and Finalisation of Which Cryptographic Primitives to Implement [RESOLVED FIXED; assigned to lkcl]
      •    771: Creation of Cryptographic-Primitive OpenPower ISA Pseudo-code [RESOLVED FIXED; assigned to lkcl]
        •    745: OP_TERNLOG instruction [RESOLVED FIXED; assigned to lkcl]
          •    753: simulator somehow ends up with SO set even though nothing writes to it [RESOLVED FIXED; assigned to lkcl]
        •    755: add grev instruction (OP_GREV) [RESOLVED FIXED; assigned to programmerjake]
          •    757: bitmanip instruction encodings -- adjust to match existing X/XO-forms? [RESOLVED FIXED; assigned to lkcl]
        •    782: add galois field bitmanip instructions [RESOLVED FIXED; assigned to programmerjake]
          •    784: Implement cl* instructions for carry-less operations [RESOLVED FIXED; assigned to programmerjake]
            •    787: Add an ikiwiki underlay for nmutil.git and/or openpower-isa.git [RESOLVED FIXED; assigned to lkcl]
          •    785: Implement gfb* instructions for GF(2^n) instructions [RESOLVED FIXED; assigned to programmerjake]
            •    784: Implement cl* instructions for carry-less operations [RESOLVED FIXED; assigned to programmerjake] (*)
            •    787: Add an ikiwiki underlay for nmutil.git and/or openpower-isa.git [RESOLVED FIXED; assigned to lkcl] (*)
          •    786: Implement gfp* instructions for GF(p) instructions [RESOLVED WONTFIX; assigned to programmerjake]
            •    787: Add an ikiwiki underlay for nmutil.git and/or openpower-isa.git [RESOLVED FIXED; assigned to lkcl] (*)
        •    817: Big Integer Math (sv.adde, sv.subfe, sv.madded, 128 by 64-bit -> 64-bit div/rem, maybe more...) [RESOLVED FIXED; assigned to lkcl]
          •    937: instructions for bigint shift and prefix-code encode [IN_PROGRESS; assigned to lkcl]
            •    1237: change knuth's algo-D divmod assembly to use new SVP64 features from bug #1183 [CONFIRMED; assigned to programmerjake] (*)
      •    772: Creation of the HDL Code for the cryptoprimitive (bitmanip, bigint, etc.) Instructions [RESOLVED FIXED; assigned to lkcl]
        •    817: Big Integer Math (sv.adde, sv.subfe, sv.madded, 128 by 64-bit -> 64-bit div/rem, maybe more...) [RESOLVED FIXED; assigned to lkcl] (*)
      •    774: Equipment needed, such as FPGA boards and Ethernet PMODs [RESOLVED FIXED; assigned to lkcl]
        •    848: FPGAs and equipment bought using FPGA-fund [RESOLVED FIXED; assigned to programmerjake]
      •    775: Project Management [RESOLVED FIXED; assigned to lkcl]
        •    1100: create pytest plugin that stores each unit test output in a file and just gives a small output to pytest [RESOLVED FIXED; assigned to programmerjake]
      •    817: Big Integer Math (sv.adde, sv.subfe, sv.madded, 128 by 64-bit -> 64-bit div/rem, maybe more...) [RESOLVED FIXED; assigned to lkcl] (*)
      •    840: Formal proofs and unit tests for cryptoprimitives [RESOLVED FIXED; assigned to lkcl]
  •    1259: PPC and SVP64 assembly/disassembly code generation [CONFIRMED; assigned to lkcl]
  •    137: NLNet 2019 Video Acceleration Proposal 2019-10-031 [RESOLVED FIXED; assigned to lkcl]
    •    159: opcode ideas, suitable for audio/video (and more) [CONFIRMED; assigned to lkcl]
    •    219: AC3 optimizations [CONFIRMED; assigned to cand]
    •    220: Vorbis optimizations [CONFIRMED; assigned to cand]
    •    221: Opus optimizations [CONFIRMED; assigned to cand]
    •    224: MPEG4 ASP optimizations [CONFIRMED; assigned to cand]
    •    225: H.264 optimizations [CONFIRMED; assigned to cand]
    •    226: H.265 optimizations [CONFIRMED; assigned to cand]
    •    231: Video Opcodes Standards writeup [CONFIRMED; assigned to addw]
      •    230: Video opcode development and discussion [RESOLVED FIXED; assigned to cand]
        •    557: First round of development of Audio/Video opcodes [RESOLVED FIXED; assigned to lkcl]
    •    233: Audio and Video unit tests needed to be run in simulator [CONFIRMED; assigned to cand]
      •    232: Implementation of video opcodes in simulator [RESOLVED FIXED; assigned to cand]
      •    864: implement parallel prefix reduction in simulator [RESOLVED FIXED; assigned to ghostmansd]
    •    235: Video opcode FPGA tests [CONFIRMED; assigned to lkcl]
      •    234: Hardware implementation of video opcodes [RESOLVED FIXED; assigned to lkcl]
        •    232: Implementation of video opcodes in simulator [RESOLVED FIXED; assigned to cand] (*)
        •    887: implement fmvis and 2nd-half variant [RESOLVED FIXED; assigned to konstantinos]
    •    218: MP3 optimizations [RESOLVED FIXED; assigned to cand]
      •    644: MP3: Basic SV impl [CONFIRMED; assigned to cand]
        •    647: add FP support to ISACaller simulator [RESOLVED FIXED; assigned to lkcl]
          •    705: add ISACaller simulator FPSCR support [CONFIRMED; assigned to lkcl]
      •    645: MP3: Optimized SV [CONFIRMED; assigned to cand]
        •    653: investigate FFT, DCT, etc for REMAP in SVP64 [RESOLVED FIXED; assigned to lkcl]
          •    658: extend SVSTATE to 64 bit [CONFIRMED; assigned to lkcl]
      •    646: MP3: Upstream [CONFIRMED; assigned to cand]
      •    933: prefix-code (like huffman code) decode/encode instructions [IN_PROGRESS; assigned to programmerjake]
        •    937: instructions for bigint shift and prefix-code encode [IN_PROGRESS; assigned to lkcl] (*)
        •    935: ISACaller doesn't handle instructions that write to both RT and RS [RESOLVED FIXED; assigned to lkcl]
      •    643: MP3: C baselines [RESOLVED FIXED; assigned to cand]
    •    222: JPEG optimizations [RESOLVED FIXED; assigned to programmerjake]
      •    933: prefix-code (like huffman code) decode/encode instructions [IN_PROGRESS; assigned to programmerjake] (*)
    •    223: MPEG1/2 optimizations [RESOLVED FIXED; assigned to programmerjake]
      •    933: prefix-code (like huffman code) decode/encode instructions [IN_PROGRESS; assigned to programmerjake] (*)
    •    227: VP8 optimizations [RESOLVED FIXED; assigned to konstantinos]
    •    228: VP9 optimizations [RESOLVED FIXED; assigned to konstantinos]
    •    229: AV1 optimizations [RESOLVED FIXED; assigned to konstantinos] (*)
    •    230: Video opcode development and discussion [RESOLVED FIXED; assigned to cand] (*)
    •    232: Implementation of video opcodes in simulator [RESOLVED FIXED; assigned to cand] (*)
    •    234: Hardware implementation of video opcodes [RESOLVED FIXED; assigned to lkcl] (*)
  •    138: NLNet 2019 Coriolis2 Layout proposal 2019-10-029 [RESOLVED FIXED; assigned to lkcl]
    •    178: first coriolis2 tutorial, workflow and "test project" page [RESOLVED FIXED; assigned to tanner.of.kha]
      •    217: create a "ring" system which allows pad locations to be specified conveniently [RESOLVED FIXED; assigned to tanner.of.kha]
    •    199: Layout using coriolis2 main core, 180nm [RESOLVED FIXED; assigned to Jean-Paul.Chaput]
      •    528: parameter needed in coriolis2 to specify individually which clocks are to have a Clock Tree [CONFIRMED; assigned to Jean-Paul.Chaput] (*)
      •    200: IEEE754 FPU Coriolis2 layout [RESOLVED FIXED; assigned to lkcl]
      •    502: determine SRAM block size and implement it [RESOLVED FIXED; assigned to staf] (*)
      •    506: 8x VDD VSS pins needed in ioring [RESOLVED FIXED; assigned to Jean-Paul.Chaput]
      •    507: ls180 asic needs an ioring, pads need defining and connecting [RESOLVED FIXED; assigned to Jean-Paul.Chaput]
        •    506: 8x VDD VSS pins needed in ioring [RESOLVED FIXED; assigned to Jean-Paul.Chaput] (*)
      •    508: decide package size and pin allocation for 180nm ASIC [RESOLVED FIXED; assigned to lkcl] (*)
      •    521: small example using JTAG for testing coriolis2 new multi clock plugin [RESOLVED FIXED; assigned to lkcl]
      •    526: create dry-run 180nm GDS-II files for IMEC [RESOLVED FIXED; assigned to lkcl]
      •    620: post-layout simulation needed using cocotb [RESOLVED FIXED; assigned to staf]
    •    200: IEEE754 FPU Coriolis2 layout [RESOLVED FIXED; assigned to lkcl] (*)
    •    201: create specifications for modifications needed for additional nmigen functionality. [RESOLVED FIXED; assigned to lkcl]
      •    276: SR NAND Latch needed in nmigen [CONFIRMED; assigned to lkcl]
      •    277: evaluate proposal of portions of nmutil for review and inclusion in nmigen [CONFIRMED; assigned to whitequark]
    •    202: potential changes to LibreSOC HDL to suit coriolis2 [RESOLVED FIXED; assigned to lkcl]
    •    203: potential improvements to coriolis2 for LibreSOC Layout [RESOLVED FIXED; assigned to Jean-Paul.Chaput]
    •    204: Transition from symbolic to real Cell Library for 180nm layout [RESOLVED FIXED; assigned to staf]
      •    199: Layout using coriolis2 main core, 180nm [RESOLVED FIXED; assigned to Jean-Paul.Chaput] (*)
      •    200: IEEE754 FPU Coriolis2 layout [RESOLVED FIXED; assigned to lkcl] (*)
    •    205: documentation of coriolis2 layout process for 180nm [RESOLVED FIXED; assigned to lkcl]
    •    696: [Coroliosis 2] Library libMut Not Found During Alliance Install [RESOLVED FIXED; assigned to lkcl]
  •    140: Implement MESA 3D Vulkan Driver NLNet 2019-10-042 [RESOLVED FIXED; assigned to lkcl]
    •    53: design and software simulation of some of the 3D custom instructions needed for the GPU [CONFIRMED; assigned to lkcl]
      •    142: Vector Ops needed (DOT, Cross, Dist, normalise, CORDIC, S/LERP etc) [CONFIRMED; assigned to lkcl]
        •    139: Swizzle needs to be high priority capability in ISA [RESOLVED FIXED; assigned to lkcl]
      •    494: "perf counters" needed [CONFIRMED; assigned to lkcl]
      •    541: implement nmigen HDL IEEE754 and Khronos FP transcendentals needed for 3D (CORDIC ones) [CONFIRMED; assigned to lkcl]
      •    127: Transcendentals needed (SIN/COS/ATAN2/EXP/LOG/POW etc.) [RESOLVED FIXED; assigned to lkcl]
        •    208: implement CORDIC in a general way sufficient to do transcendentals [RESOLVED FIXED; assigned to lkcl]
      •    208: implement CORDIC in a general way sufficient to do transcendentals [RESOLVED FIXED; assigned to lkcl] (*)
    •    253: Add hardware implementations of 3D accelerated opcodes [CONFIRMED; assigned to lkcl]
    •    260: Figure out creating userspace-driven explicit synchronization for Linux Kernel sync_file and dma_fence [CONFIRMED; assigned to lkcl]
    •    386: Evaluate Lavapipe (nee Vallium) instead of Kazan or new Mesa driver [CONFIRMED; assigned to lkcl]
    •    405: Write PowerPC64 backend for Cranelift [CONFIRMED; assigned to programmerjake]
    •    251: Initial 3D MESA non-accelerated software-only driver is needed [RESOLVED FIXED; assigned to lkcl]
      •    483: replicable test suite for LibreSOC 3D MESA library [CONFIRMED; assigned to lkcl]
      •    613: MESA3D: NIR/LLVM/x86 successful generation for simple shaders [CONFIRMED; assigned to lkcl]
      •    466: comprehensive evaluation and planning for 3D MESA driver [RESOLVED FIXED; assigned to lkcl]
    •    252: 3D accelerated opcodes need to be added to the POWER ISA simulator [RESOLVED FIXED; assigned to lkcl]
    •    254: Second iteration round for opcodes, simulation and hardware for 3D MESA [RESOLVED FIXED; assigned to lkcl]
      •    922: UTF-8/16 on SVP64 [CONFIRMED; assigned to programmerjake]
    •    255: formal standard documentation of 3D Opcodes [RESOLVED FIXED; assigned to addw]
      •    142: Vector Ops needed (DOT, Cross, Dist, normalise, CORDIC, S/LERP etc) [CONFIRMED; assigned to lkcl] (*)
  •    158: NLNet 2019 Formal Correctness Proofs toplevel 2019-10-032 [RESOLVED FIXED; assigned to 2019-10P]
    •    211: formal proof of PowerDecoder stage2 needed [CONFIRMED; assigned to lkcl] (*)
    •    195: Formal correctness framework is needed for Power ISA [RESOLVED FIXED; assigned to lkcl]
      •    211: formal proof of PowerDecoder stage2 needed [CONFIRMED; assigned to lkcl] (*)
      •    306: Formal Correctness Proof for ALU pipeline [RESOLVED FIXED; assigned to kc5tja] (*)
      •    331: Formal Correctness Proof for LOGICAL pipeline [RESOLVED FIXED; assigned to lkcl] (*)
      •    332: Formal correctness proof needed for CR pipeline [RESOLVED FIXED; assigned to mtnolan2640] (*)
      •    418: SPR pipeline formal correctness proof needed [RESOLVED FIXED; assigned to kc5tja] (*)
      •    419: MUL pipeline formal proof needed [RESOLVED FIXED; assigned to kc5tja] (*)
    •    196: Formal correctness proof needed for the IEEE754 FPU [RESOLVED FIXED; assigned to lkcl]
      •    596: formal correctness proof for nmigen integration of Dynamic Partitioned Signal [CONFIRMED; assigned to mail]
      •    868: Formal verification of fadd/fsub [IN_PROGRESS; assigned to programmerjake]
        •    835: add support for smtlib2 floating-point to yosys and nmigen [RESOLVED FIXED; assigned to programmerjake]
        •    869: Formal verification of fadd for just round-nearest-ties-to-even without exception flags/traps [RESOLVED FIXED; assigned to programmerjake]
          •    835: add support for smtlib2 floating-point to yosys and nmigen [RESOLVED FIXED; assigned to programmerjake] (*)
        •    874: Implementation and Formal verification of fadd for all rounding modes but without exception flags/traps [RESOLVED FIXED; assigned to programmerjake]
          •    835: add support for smtlib2 floating-point to yosys and nmigen [RESOLVED FIXED; assigned to programmerjake] (*)
        •    876: Implement and Add Formal Proof for fsub in the fpadd pipeline [RESOLVED FIXED; assigned to programmerjake]
          •    835: add support for smtlib2 floating-point to yosys and nmigen [RESOLVED FIXED; assigned to programmerjake] (*)
      •    162: Formally Verify the FSGNJ module [PAYMENTPENDING FIXED; assigned to mtnolan2640]
      •    163: Formally Verify the FPMAX module [PAYMENTPENDING FIXED; assigned to mtnolan2640]
      •    165: Formally verify the FPCMP (FEQ, FLE, FLT) module [PAYMENTPENDING FIXED; assigned to mtnolan2640]
      •    835: add support for smtlib2 floating-point to yosys and nmigen [RESOLVED FIXED; assigned to programmerjake] (*)
      •    877: implementation and formal correctness proof for fp fused-mul-add pipeline excluding ieee754 exception flags [RESOLVED FIXED; assigned to programmerjake]
        •    835: add support for smtlib2 floating-point to yosys and nmigen [RESOLVED FIXED; assigned to programmerjake] (*)
    •    197: Formal correctness proof needed of the 6600-style Out-of-Order execution engine [RESOLVED FIXED; assigned to lkcl]
      •    879: Formal proof of soc.experiment.compalu_multi.MultiCompUnit needed [RESOLVED FIXED; assigned to cestrauss]
    •    198: Formal correctness proofs are needed for low-level libraries in LibreSOC [RESOLVED FIXED; assigned to programmerjake]
      •    211: formal proof of PowerDecoder stage2 needed [CONFIRMED; assigned to lkcl] (*)
      •    901: Formal proof for PriorityPicker and MultiPriorityPicker and BetterMultiPriorityPicker [RESOLVED FIXED; assigned to programmerjake]
      •    902: Formal proof for nmutil byterev.py [RESOLVED FIXED; assigned to programmerjake]
      •    903: Formal proof for nmigen.queue.Queue [RESOLVED FIXED; assigned to programmerjake]
      •    904: Formal proof for pop-count [RESOLVED FIXED; assigned to programmerjake]
      •    909: Formal proof of nmutil/plru.py [RESOLVED FIXED; assigned to programmerjake]
    •    577: gcc compiler, binutils and assembly macros for OpenPOWER-SV [RESOLVED FIXED; assigned to lkcl]
      •    579: c/c++ macros for inline assembly supporting svp64 [IN_PROGRESS; assigned to programmerjake]
      •    836: binutils: support the rest of bitmanip instructions [CONFIRMED; assigned to ghostmansd]
        •    852: implement grevlut* [CONFIRMED; assigned to lkcl]
      •    550: binutils support needed for svp64 [RESOLVED FIXED; assigned to lkcl]
        •    867: add svindex instruction to binutils (and openpower-isa infrastructure) [RESOLVED FIXED; assigned to ghostmansd]
        •    872: binutil needs support for new Pack/Unpack modes [RESOLVED INVALID; assigned to ghostmansd]
          •    871: implement pack/unpack mode in ISACaller [RESOLVED FIXED; assigned to lkcl]
      •    578: python-based svp64 "generator" class [RESOLVED FIXED; assigned to lkcl]
      •    834: binutils: support draft fsins/fcoss/ternlogi instructions [RESOLVED FIXED; assigned to ghostmansd]
      •    907: structure packing SVG [RESOLVED FIXED; assigned to veerakumar.r]
  •    174: NLNet 2019 Formal Standards OpenPOWER proposal 2019-10-046 [RESOLVED FIXED; assigned to addw]
    •    213: SimpleV Standard writeup needed [RESOLVED FIXED; assigned to addw]
      •    529: scheme for supporting 16/48-bit instructions on PowerPC LE with full backward compatibility [CONFIRMED; assigned to lkcl]
      •    534: analysis of former variant of SVPrefix to fit onto OpenPOWER with little-to-no modification [CONFIRMED; assigned to lkcl]
      •    552: single-predication has "splat" capability, needs review [CONFIRMED; assigned to lkcl]
      •    554: pred-result may not be useful [CONFIRMED; assigned to lkcl]
      •    555: encode a dotproduct in a single instruction [CONFIRMED; assigned to oliva]
      •    558: gcc SV intrinsics concept [CONFIRMED; assigned to oliva]
      •    559: analyse implications of automatic detection of changing VL loop direction [CONFIRMED; assigned to lkcl]
      •    561: fail-first gather/scatter LD/ST means "strided" [CONFIRMED; assigned to lkcl]
      •    563: 128-bit instructions and SimpleV [CONFIRMED; assigned to lkcl]
      •    564: add SV variant of fcvt to deal with elwidth differences in OpenPOWER FP scalar formats [CONFIRMED; assigned to lkcl]
      •    568: missing setvl/setvli behavior textual description of behavior [CONFIRMED; assigned to lkcl]
      •    569: svp64 register predicates vs BE arrays of bits [CONFIRMED; assigned to lkcl]
      •    572: elwidth and indirection: two vectors, one width [CONFIRMED; assigned to lkcl]
      •    574: SV saturation descriptions [CONFIRMED; assigned to lkcl]
      •    687: SVP64 CR operations section needed [CONFIRMED; assigned to lkcl]
      •    697: SVP64 Reduce Modes [CONFIRMED; assigned to lkcl] (*)
      •    788: deterministic schedule for convolution [CONFIRMED; assigned to lkcl]
      •    897: de-spacer demo algorithm [CONFIRMED; assigned to lkcl] (*)
      •    127: Transcendentals needed (SIN/COS/ATAN2/EXP/LOG/POW etc.) [RESOLVED FIXED; assigned to lkcl] (*)
      •    143: REMAP CSR for Matrix Multiplies [RESOLVED FIXED; assigned to lkcl]
      •    527: SV Predication needs to be defined [RESOLVED FIXED; assigned to lkcl]
      •    533: design new CR instructions suitable for predication [RESOLVED FIXED; assigned to programmerjake]
      •    535: setvl/setvli encoding & future reg file expansion [RESOLVED FIXED; assigned to lkcl]
      •    560: big-endian little-endian SV regfile layout idea [RESOLVED WONTFIX; assigned to programmerjake]
      •    562: make elwidth's encoding more intuitive [RESOLVED FIXED; assigned to lkcl]
      •    570: svp64 vector loads: sub-dword selection before or after byte-reversal [RESOLVED INVALID; assigned to lkcl]
      •    664: design SVP64 branch instructions (sv.bc) [RESOLVED FIXED; assigned to lkcl]
      •    699: Draft Release v0.1 of SVP64 [RESOLVED FIXED; assigned to lkcl]
      •    794: UTF8 validation [RESOLVED FIXED; assigned to programmerjake]
        •    922: UTF-8/16 on SVP64 [CONFIRMED; assigned to programmerjake] (*)
    •    214: ISAMUX/NS Standard writeup needed [RESOLVED FIXED; assigned to addw]
    •    236: Atomics Standard writeup needed [RESOLVED FIXED; assigned to programmerjake]
    •    237: Variable encoding Standards writeup needed, 16/32/48/64 [RESOLVED FIXED; assigned to lkcl]
    •    238: POWER Compressed Formal Standard writeup [RESOLVED FIXED; assigned to addw]
      •    532: discuss iterative approach for statistical analysis of effectiveness of Compressed PowerISA encoding [CONFIRMED; assigned to lkcl]
    •    239: FP16 (and FP128) POWER Formal Standard proposal [RESOLVED FIXED; assigned to addw]
    •    240: POWER-RISCV ISA switch formal standard writeup needed [RESOLVED FIXED; assigned to addw]
    •    241: OpenPOWER Simulation is needed of standards [RESOLVED FIXED; assigned to lkcl]
      •    581: power-gem5 needs upstream merging [CONFIRMED; assigned to lkcl]
      •    602: low performance bare minimum functionality SIMD emulator required [CONFIRMED; assigned to lkcl]
      •    618: add SVP64 predication to ISACaller [CONFIRMED; assigned to lkcl]
      •    705: add ISACaller simulator FPSCR support [CONFIRMED; assigned to lkcl] (*)
      •    232: Implementation of video opcodes in simulator [RESOLVED FIXED; assigned to cand] (*)
      •    258: Finish implementing support for Power in simple-soft-float [RESOLVED INVALID; assigned to programmerjake]
      •    269: auto-conversion / parser of POWER ISA Spec v3.0B [PAYMENTPENDING FIXED; assigned to lkcl]
        •    280: POWER spec parser needs to support fall-through cases [CONFIRMED; assigned to lkcl]
        •    282: investigate partially-generating unit tests from spec [CONFIRMED; assigned to mtnolan2640]
      •    272: functions needed in POWER simulator which match 3.0B spec [RESOLVED FIXED; assigned to mtnolan2640]
        •    278: POWER v3.0B spec ambiguity on EXTS and missing EXTZ [CONFIRMED; assigned to lkcl]
        •    463: python based cycle accurate POWER9 simulator [RESOLVED FIXED; assigned to lkcl] (*)
      •    463: python based cycle accurate POWER9 simulator [RESOLVED FIXED; assigned to lkcl] (*)
      •    604: ISACaller simulator needs RADIX MMU support [RESOLVED FIXED; assigned to lkcl]
      •    647: add FP support to ISACaller simulator [RESOLVED FIXED; assigned to lkcl] (*)
      •    665: very basic nmigen-to-c compiler needed [RESOLVED FIXED; assigned to lkcl]
        •    760: calculate signal values in a Topological Ordering [CONFIRMED; assigned to wielgusmikolaj]
      •    701: document Matrix REMAP in SVP64 [RESOLVED FIXED; assigned to andy.miroshnikov] (*)
      •    728: ISACaller needs a cleanup and partial re-factoring [RESOLVED FIXED; assigned to lkcl]
      •    758: pypowersim and how to run bare metal programs/functions is needed [RESOLVED FIXED; assigned to andy.miroshnikov]
    •    242: OpenPOWER simulation unit tests are needed [RESOLVED FIXED; assigned to lkcl]
      •    686: create Power ISA test API [RESOLVED FIXED; assigned to lkcl]
      •    880: setvl CTR unit tests needed [RESOLVED FIXED; assigned to lkcl]
    •    243: Documentation budget for OpenPower Member discussion and proposals [RESOLVED FIXED; assigned to lkcl]
      •    839: SVP64 / Extra-V / ZOLC whitepaper [RESOLVED FIXED; assigned to lkcl]
      •    858: SVP64 Primer Documentation [RESOLVED FIXED; assigned to andy.miroshnikov]
      •    875: SVP64 Spec Document Generation [RESOLVED FIXED; assigned to lkcl]
  •    175: NLNet 2019 Wishbone proposal 2019-10-043 [RESOLVED FIXED; assigned to lkcl]
    •    244: Wishbone B4 Streaming Specification enhancement. [CONFIRMED; assigned to rudi]
    •    245: Wisbone B4 Streaming Reference Implementations with unit tests [CONFIRMED; assigned to rudi]
    •    246: Wishbone B4 Streaming I2S peripheral for LibreSOC [CONFIRMED; assigned to rudi]
    •    248: Wishbone B4 Streaming presentation at ORConf 2020 [CONFIRMED; assigned to lkcl]
    •    250: Wishbone B4 Streaming Formal correctness proof needed [CONFIRMED; assigned to lkcl]
    •    249: Additional Wishbone B4 peripherals for Libre-SOC (including conversion from patented AXI4) [RESOLVED FIXED; assigned to lkcl]
      •    803: ls2/gram does not wire clock / reset controls [CONFIRMED; assigned to lkcl]
    •    362: improvements to nmigen and yosys [RESOLVED FIXED; assigned to lkcl]
      •    364: CXXRTL Python Interface [PAYMENTPENDING FIXED; assigned to whitequark]
      •    458: PartitionedSignal needs nmigen constructs "m.If", Switch etc [RESOLVED FIXED; assigned to programmerjake]
        •    708: PartitionedSignal API design [CONFIRMED; assigned to programmerjake]
        •    734: add Partitioned SimdSignal support for elwidth-based layouts (currently ElwidPartType) [CONFIRMED; assigned to lkcl]
    •    383: Complete first functional POWER9 Core [RESOLVED FIXED; assigned to lkcl] (*)
    •    384: Documentation for the Libre-SOC Power ISA Core and internal architecture [RESOLVED FIXED; assigned to lkcl]
      •    460: Documenting the Out of Order architecture [RESOLVED FIXED; assigned to lkcl]
      •    549: document the logical partitioned signal operators xor some and all [RESOLVED FIXED; assigned to lkcl]
      •    556: document SV OpenPOWER [RESOLVED FIXED; assigned to lkcl]
      •    660: "First developer steps" documentation page [RESOLVED FIXED; assigned to ghostmansd]
      •    674: fix budget for #384 [RESOLVED FIXED; assigned to lkcl]
      •    714: Coriolis2 Installation as Normal User Script [RESOLVED FIXED; assigned to lkcl]
      •    878: image conversion explaining multi-issue [RESOLVED FIXED; assigned to veerakumar.r]
  •    191: NLNet 2019 Core Proposal 2019-02-012 [RESOLVED FIXED; assigned to lkcl]
    •    22: FPGA proof-of-concept test needed [CONFIRMED; assigned to lkcl] (*)
    •    51: Virtual Memory Management system [CONFIRMED; assigned to lkcl]
      •    491: MMU Function Unit needed [RESOLVED FIXED; assigned to lkcl] (*)
    •    52: software simulator compliant with the latest SimpleV Vectorisation Standard (SVP64) [CONFIRMED; assigned to lkcl]
      •    170: high-to-low register-to-register copy needed [CONFIRMED; assigned to lkcl]
      •    104: add subvl support from latest sv 0.6 draft spec [RESOLVED INVALID; assigned to lkcl]
      •    105: sv 0.6 draft support for fail-on-first condition (and trap) [RESOLVED INVALID; assigned to lkcl]
      •    232: Implementation of video opcodes in simulator [RESOLVED FIXED; assigned to cand] (*)
    •    53: design and software simulation of some of the 3D custom instructions needed for the GPU [CONFIRMED; assigned to lkcl] (*)
    •    54: Kazan Vulkan driver operational [CONFIRMED; assigned to programmerjake]
      •    161: Create Shader Compiler IR and SPIR-V to IR translator [IN_PROGRESS; assigned to programmerjake]
        •    725: Research Naga to see if it will help un-stall #161 [IN_PROGRESS; assigned to programmerjake]
        •    177: implement enough of #161 to translate basic shader to shader-compiler-ir [PAYMENTPENDING FIXED; assigned to programmerjake]
      •    260: Figure out creating userspace-driven explicit synchronization for Linux Kernel sync_file and dma_fence [CONFIRMED; assigned to lkcl] (*)
      •    386: Evaluate Lavapipe (nee Vallium) instead of Kazan or new Mesa driver [CONFIRMED; assigned to lkcl] (*)
      •    405: Write PowerPC64 backend for Cranelift [CONFIRMED; assigned to programmerjake] (*)
      •    632: Create Vector Math library shared with Rust's project portable SIMD (`std::simd`) [IN_PROGRESS; assigned to programmerjake]
        •    652: First part of implementing the vector-math library for Kazan and rustc [RESOLVED FIXED; assigned to programmerjake]
      •    83: Implementing the SPIR-V structure parser [PAYMENTPENDING FIXED; assigned to programmerjake]
      •    451: Add PowerPC64 to Rust's new inline assembly implementation [RESOLVED FIXED; assigned to programmerjake]
    •    70: evaluate Bus Architectures [DEFERRED; assigned to lkcl]
    •    48: Complete IEEE754 floating point pipeline [RESOLVED FIXED; assigned to lkcl]
      •    102: IEEE754 pipeline "early out" needed [CONFIRMED; assigned to lkcl]
        •    106: pipeline early-in, early-out on concurrent function units [CONFIRMED; assigned to lkcl]
      •    114: reservation station "feedback" for further processing (FP64) [CONFIRMED; assigned to lkcl]
        •    106: pipeline early-in, early-out on concurrent function units [CONFIRMED; assigned to lkcl] (*)
      •    115: SIMD ALUs needed [CONFIRMED; assigned to lkcl]
        •    1024: Second phase of nmigen Dynamic Partitioned SIMD and nmigen language improvements [CONFIRMED; assigned to lkcl]
        •    101: IEEE754 pipeline "go_die" (Computation Unit Cancellation) needed [RESOLVED FIXED; assigned to lkcl]
        •    132: SIMD-like nmigen signal for partitioning [RESOLVED FIXED; assigned to lkcl]
          •    168: create naturally aligned partition points [CONFIRMED; assigned to lkcl]
          •    176: partitioned dynamic bool/all/any/xor operators [CONFIRMED; assigned to lkcl]
          •    467: PartitionedSignal needs to work with Arrays [CONFIRMED; assigned to lkcl]
          •    575: PartitionedEqGtLe needs to use RippleLSB [CONFIRMED; assigned to lkcl]
          •    708: PartitionedSignal API design [CONFIRMED; assigned to programmerjake] (*)
          •    718: PartitionedSignal __r*__ functions need review [CONFIRMED; assigned to lkcl]
          •    719: PartitionedSignal signed and unsigned [CONFIRMED; assigned to lkcl]
          •    720: PartitionedSignal cast needed [CONFIRMED; assigned to lkcl]
          •    734: add Partitioned SimdSignal support for elwidth-based layouts (currently ElwidPartType) [CONFIRMED; assigned to lkcl] (*)
          •    735: DynamicPartitionedShift has hdl parameter that is not needed [CONFIRMED; assigned to lkcl]
          •    167: a partitioned mux is needed [RESOLVED FIXED; assigned to lkcl]
          •    171: partitioned comparison operators [PAYMENTPENDING FIXED; assigned to lkcl]
            •    575: PartitionedEqGtLe needs to use RippleLSB [CONFIRMED; assigned to lkcl] (*)
          •    172: partitioned signal add/sub/neg [PAYMENTPENDING FIXED; assigned to lkcl]
          •    173: dynamic partitioned "shift" [PAYMENTPENDING FIXED; assigned to lkcl]
          •    458: PartitionedSignal needs nmigen constructs "m.If", Switch etc [RESOLVED FIXED; assigned to programmerjake] (*)
          •    565: Improve formal verification on PartitionedSignal [RESOLVED FIXED; assigned to cestrauss]
          •    707: PartitionedSignal limited Cat function needed [RESOLVED FIXED; assigned to lkcl]
          •    709: PartitionedSignal eq needs to be more sophisticated [RESOLVED FIXED; assigned to lkcl]
      •    116: Integer ADD/MUL/DIV operations needed (using FP bypass). SIMD as well [CONFIRMED; assigned to lkcl]
        •    102: IEEE754 pipeline "early out" needed [CONFIRMED; assigned to lkcl] (*)
        •    114: reservation station "feedback" for further processing (FP64) [CONFIRMED; assigned to lkcl] (*)
        •    115: SIMD ALUs needed [CONFIRMED; assigned to lkcl] (*)
        •    124: add dynamically removable/insertable pipeline registers to div pipe to allow high clock speeds [CONFIRMED; assigned to lkcl]
        •    101: IEEE754 pipeline "go_die" (Computation Unit Cancellation) needed [RESOLVED FIXED; assigned to lkcl] (*)
      •    118: FP Flags are needed [CONFIRMED; assigned to lkcl]
      •    119: Zero and sign extension blocks are needed, FP.and INT [CONFIRMED; assigned to lkcl]
      •    121: refactor FP exponent naming [CONFIRMED; assigned to lkcl]
      •    126: Make Div core conditional (enable signal) [CONFIRMED; assigned to lkcl]
      •    136: partitioned multiplier needs to be adapted to Dadda algorithm [CONFIRMED; assigned to lkcl]
      •    512: use m.submodules["...%d"] = mod instead of setattr [CONFIRMED; assigned to lkcl] (*)
      •    43: create an IEEE754 FP "sqrt" [PAYMENTPENDING FIXED; assigned to alexandar.kostovic]
      •    44: IEEE754 FPU inverse (reciprocal) sqrt [PAYMENTPENDING FIXED; assigned to programmerjake]
        •    110: RISC-V FP Reciprocal (inverse) square root ISA extension needed [RESOLVED INVALID; assigned to lkcl]
      •    74: preliminary exploratory software emulation of FP SQRT [RESOLVED FIXED; assigned to alexandar.kostovic]
      •    75: create an IEEE754 FP "add" pipeline [PAYMENTPENDING FIXED; assigned to lkcl]
      •    76: IEEE754 RISC-V "tininess" as well as rounding modes (odd/even) needed [RESOLVED INVALID; assigned to lkcl]
      •    77: IEEE754 FP "mul" needed [PAYMENTPENDING FIXED; assigned to lkcl]
        •    60: N-stage 64-bit multiplier pipeline needed (signed/unsigned) [PAYMENTPENDING FIXED; assigned to programmerjake]
          •    84: add test for pipelined version of integer multiplier [RESOLVED FIXED; assigned to programmerjake]
      •    78: IEEE754 FP "div" needed [PAYMENTPENDING FIXED; assigned to lkcl]
      •    99: IEEE754 *pipelined* FPDIV unit needed [PAYMENTPENDING FIXED; assigned to programmerjake]
      •    101: IEEE754 pipeline "go_die" (Computation Unit Cancellation) needed [RESOLVED FIXED; assigned to lkcl] (*)
      •    107: IEEE754 FPU FCVT "downconversion" needed [PAYMENTPENDING FIXED; assigned to lkcl]
      •    108: IEEE754 FPU FCVT "upconversion" needed [PAYMENTPENDING FIXED; assigned to lkcl]
      •    111: FCVT unsigned/signed char/short/int/long (8/16/32/64) to FP16/32/64 needed [PAYMENTPENDING FIXED; assigned to lkcl]
      •    112: FCVT FP16/32/64 to unsigned/signed char/short/int/long (8/16/32/64) needed [PAYMENTPENDING FIXED; assigned to lkcl]
      •    113: FCVT unit tests have too great a dynamic range [RESOLVED FIXED; assigned to lkcl]
      •    117: RISCV FCLASS instruction needed [PAYMENTPENDING FIXED; assigned to lkcl]
      •    120: implement RISC-V FSGNJ instruction [PAYMENTPENDING FIXED; assigned to mtnolan2640]
      •    122: FP software emulation needed, [RESOLVED FIXED; assigned to lkcl]
        •    145: reference FP emulation using algebraic numbers [RESOLVED FIXED; assigned to programmerjake]
          •    146: create python bindings to reference FP implementation [RESOLVED FIXED; assigned to programmerjake]
        •    146: create python bindings to reference FP implementation [RESOLVED FIXED; assigned to programmerjake] (*)
      •    123: IEEE754 FPU FMAC needed [RESOLVED DUPLICATE; assigned to lkcl]
      •    125: need NaN unboxing operation [RESOLVED INVALID; assigned to lkcl]
      •    127: Transcendentals needed (SIN/COS/ATAN2/EXP/LOG/POW etc.) [RESOLVED FIXED; assigned to lkcl] (*)
      •    129: FP comparisons needed [PAYMENTPENDING FIXED; assigned to mtnolan2640]
      •    130: FMIN/MAX needed [PAYMENTPENDING FIXED; assigned to mtnolan2640]
      •    132: SIMD-like nmigen signal for partitioning [RESOLVED FIXED; assigned to lkcl] (*)
    •    49: basic processor core (I/O and boot processor) [RESOLVED INVALID; assigned to lkcl]
      •    60: N-stage 64-bit multiplier pipeline needed (signed/unsigned) [PAYMENTPENDING FIXED; assigned to programmerjake] (*)
    •    50: nmigen pinmux [RESOLVED FIXED; assigned to lkcl] (*)
  •    589: NLnet top-level gigabit crypto router 2021-02-052 [RESOLVED FIXED; assigned to lkcl] (*)
  •    690: NGI POINTER Gigabit Router ASIC, top level milestone [RESOLVED FIXED; assigned to lkcl]
    •    694: contact NGI POINTER Tapas Router team [CONFIRMED; assigned to lkcl]
    •    737: in-order single-issue Power ISA 3.0 core [CONFIRMED; assigned to cestrauss] (*)
    •    741: bitmanip ALU implementation [IN_PROGRESS; assigned to programmerjake]
      •    745: OP_TERNLOG instruction [RESOLVED FIXED; assigned to lkcl] (*)
      •    755: add grev instruction (OP_GREV) [RESOLVED FIXED; assigned to programmerjake] (*)
      •    757: bitmanip instruction encodings -- adjust to match existing X/XO-forms? [RESOLVED FIXED; assigned to lkcl] (*)
      •    782: add galois field bitmanip instructions [RESOLVED FIXED; assigned to programmerjake] (*)
    •    742: MultiCompUnit wrmask relies on sync ok [CONFIRMED; assigned to lkcl]
    •    747: verify that instructions that write to the same register twice are correctly decoded as illegal/trap [CONFIRMED; assigned to lkcl] (*)
    •    262: power virtual memory needed (radix?) [RESOLVED FIXED; assigned to lkcl]
      •    51: Virtual Memory Management system [CONFIRMED; assigned to lkcl] (*)
      •    759: upgrade MMU to PTCR (partition table) [CONFIRMED; assigned to lkcl]
      •    450: Create MMU from microwatt mmu.vhdl [RESOLVED FIXED; assigned to lkcl] (*)
      •    491: MMU Function Unit needed [RESOLVED FIXED; assigned to lkcl] (*)
    •    469: Create D-cache from microwatt dcache.vhdl [RESOLVED FIXED; assigned to lkcl] (*)
    •    485: Create I-Cache from microwatt icache.vhdl [RESOLVED FIXED; assigned to lkcl] (*)
    •    491: MMU Function Unit needed [RESOLVED FIXED; assigned to lkcl] (*)
    •    691: Ethics review [RESOLVED FIXED; assigned to lkcl]
    •    692: NGI POINTER Kickoff 2021 Sep 13 [RESOLVED FIXED; assigned to lkcl]
    •    693: talk to Sphinx NGI POINTER team [RESOLVED INVALID; assigned to lkcl]
    •    695: meeting discussion with Project Mentor [RESOLVED FIXED; assigned to lkcl]
    •    724: Determine required memory compiler developments [RESOLVED FIXED; assigned to staf]
    •    739: NGI POINTER Gigabit Router Pinout Considerations [RESOLVED FIXED; assigned to andy.miroshnikov]
      •    50: nmigen pinmux [RESOLVED FIXED; assigned to lkcl] (*)
      •    746: I2C needs an Open Drain IO Pad [RESOLVED FIXED; assigned to staf] (*)
    •    778: strategy for connecting eth_mac suitable for ASIC deployment [RESOLVED WONTFIX; assigned to lkcl]
    •    795: No console output from ls2 builds [RESOLVED FIXED; assigned to lkcl]
    •    813: FPGA Simulation [RESOLVED FIXED; assigned to lkcl]
      •    803: ls2/gram does not wire clock / reset controls [CONFIRMED; assigned to lkcl] (*)
      •    805: gram randomly comes up in an unworkable condition [CONFIRMED; assigned to lkcl]
        •    811: gram clock tree stop/reset not wired up on ECP5 [CONFIRMED; assigned to tpearson]
      •    811: gram clock tree stop/reset not wired up on ECP5 [CONFIRMED; assigned to tpearson] (*)
      •    812: invalid access to 0x0 on startup leads to core hang [CONFIRMED; assigned to tpearson]
      •    801: ls2/gram DDR3 controller not working on hardware [RESOLVED FIXED; assigned to lkcl]
      •    804: gram PAUSE timing violation [RESOLVED FIXED; assigned to lkcl]
      •    806: Nest should be able to run at different clock rate than main CPU [RESOLVED FIXED; assigned to tpearson]
        •    807: WB64to32Convert spurious ACK during master STALL in burst transfer [RESOLVED INVALID; assigned to tpearson]
    •    826: Trial run of ethmac (freecores) layout. [RESOLVED FIXED; assigned to lkcl]
    •    827: 2RW SRAM cell design; 1RW SRAM cell improvement [RESOLVED INVALID; assigned to staf]
    •    828: 2RW and 1RW SRAM compiler development [RESOLVED WONTFIX; assigned to staf]
    •    829: Post-layout verification of ASIC SRAM blocks [RESOLVED INVALID; assigned to staf]
    •    830: TSMC 0.18um setup [RESOLVED INVALID; assigned to staf]
    •    850: NGI POINTER Milestone 3 [RESOLVED FIXED; assigned to lkcl]
      •    860: PowerEL ppc64sffs [IN_PROGRESS; assigned to toshaan]
      •    739: NGI POINTER Gigabit Router Pinout Considerations [RESOLVED FIXED; assigned to andy.miroshnikov] (*)
      •    855: add libre-soc to kestrel [RESOLVED FIXED; assigned to tpearson]
        •    859: Implement SPR_KAIVB [CONFIRMED; assigned to lkcl]
      •    870: FPGA equipment for NGI POINTER (2) [RESOLVED FIXED; assigned to tpearson]
      •    888: ls180 PLL port to sky130 needed [RESOLVED FIXED; assigned to dimitri.galayko]
      •    889: eth_mac VLSI Layout in tsmc180 and sky130 [RESOLVED FIXED; assigned to Jean-Paul.Chaput]
        •    934: Evaluation of optimized placement for Yosys generated SRAM [CONFIRMED; assigned to lkcl]
  •    748: NLnet toplevel Milestone 2021-08-049 coriolis2 [RESOLVED FIXED; assigned to lkcl]

Bug 938 does not block any bugs.

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